Commit d4b9fc2a authored by Kever Yang's avatar Kever Yang Committed by Heiko Stuebner
Browse files

arm64: dts: rockchip: Add rk3576 pcie nodes 



rk3576 has two pcie controllers, both are pcie2x1 work with
naneng-combphy.

Signed-off-by: default avatarKever Yang <kever.yang@rock-chips.com>
Tested-by: default avatarShawn Lin <Shawn.lin@rock-chips.com>
Reviewed-by: default avatarNicolas Frattaroli <nicolas.frattaroli@collabora.com>
Tested-by: default avatarNicolas Frattaroli <nicolas.frattaroli@collabora.com>
Link: https://lore.kernel.org/r/20250414145110.11275-3-kever.yang@rock-chips.com


Signed-off-by: default avatarHeiko Stuebner <heiko@sntech.de>
parent abfe411a

arch/arm64/boot/dts/rockchip/rk3576.dtsi

+108 −0
Original line number Diff line number Diff line
@@ -1240,6 +1240,114 @@ qos_npu_m1ro: qos@27f22100 { 
			reg = <0x0 0x27f22100 0x0 0x20>;

		};



		pcie0: pcie@2a200000 {

			compatible = "rockchip,rk3576-pcie", "rockchip,rk3568-pcie";

			reg = <0x0 0x22000000 0x0 0x00400000>,

			      <0x0 0x2a200000 0x0 0x00010000>,

			      <0x0 0x20000000 0x0 0x00100000>;

			reg-names = "dbi", "apb", "config";

			bus-range = <0x0 0xf>;

			clocks = <&cru ACLK_PCIE0_MST>, <&cru ACLK_PCIE0_SLV>,

				 <&cru ACLK_PCIE0_DBI>, <&cru PCLK_PCIE0>,

				 <&cru CLK_PCIE0_AUX>;

			clock-names = "aclk_mst", "aclk_slv",

				      "aclk_dbi", "pclk",

				      "aux";

			device_type = "pci";

			interrupts = <GIC_SPI 281 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 282 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 279 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 280 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 278 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 283 IRQ_TYPE_LEVEL_HIGH>;

			interrupt-names = "sys", "pmc", "msg", "legacy", "err", "msi";

			#interrupt-cells = <1>;

			interrupt-map-mask = <0 0 0 7>;

			interrupt-map = <0 0 0 1 &pcie0_intc 0>,

					<0 0 0 2 &pcie0_intc 1>,

					<0 0 0 3 &pcie0_intc 2>,

					<0 0 0 4 &pcie0_intc 3>;

			linux,pci-domain = <0>;

			max-link-speed = <2>;

			num-ib-windows = <8>;

			num-viewport = <8>;

			num-ob-windows = <2>;

			num-lanes = <1>;

			phys = <&combphy0_ps PHY_TYPE_PCIE>;

			phy-names = "pcie-phy";

			power-domains = <&power RK3576_PD_PHP>;

			ranges = <0x01000000 0x0 0x20100000 0x0 0x20100000 0x0 0x00100000

				  0x02000000 0x0 0x20200000 0x0 0x20200000 0x0 0x00e00000

				  0x03000000 0x9 0x00000000 0x9 0x00000000 0x0 0x80000000>;

			resets = <&cru SRST_PCIE0_POWER_UP>, <&cru SRST_P_PCIE0>;

			reset-names = "pwr", "pipe";

			#address-cells = <3>;

			#size-cells = <2>;

			status = "disabled";



			pcie0_intc: legacy-interrupt-controller {

				interrupt-controller;

				#address-cells = <0>;

				#interrupt-cells = <1>;

				interrupt-parent = <&gic>;

				interrupts = <GIC_SPI 280 IRQ_TYPE_EDGE_RISING>;

			};

		};



		pcie1: pcie@2a210000 {

			compatible = "rockchip,rk3576-pcie", "rockchip,rk3568-pcie";

			reg = <0x0 0x22400000 0x0 0x00400000>,

			      <0x0 0x2a210000 0x0 0x00010000>,

			      <0x0 0x21000000 0x0 0x00100000>;

			reg-names = "dbi", "apb", "config";

			bus-range = <0x20 0x2f>;

			clocks = <&cru ACLK_PCIE1_MST>, <&cru ACLK_PCIE1_SLV>,

				 <&cru ACLK_PCIE1_DBI>, <&cru PCLK_PCIE1>,

				 <&cru CLK_PCIE1_AUX>;

			clock-names = "aclk_mst", "aclk_slv",

				      "aclk_dbi", "pclk",

				      "aux";

			device_type = "pci";

			interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 264 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>;

			interrupt-names = "sys", "pmc", "msg", "legacy", "err", "msi";

			#interrupt-cells = <1>;

			interrupt-map-mask = <0 0 0 7>;

			interrupt-map = <0 0 0 1 &pcie1_intc 0>,

					<0 0 0 2 &pcie1_intc 1>,

					<0 0 0 3 &pcie1_intc 2>,

					<0 0 0 4 &pcie1_intc 3>;

			linux,pci-domain = <0>;

			max-link-speed = <2>;

			num-ib-windows = <8>;

			num-viewport = <8>;

			num-ob-windows = <2>;

			num-lanes = <1>;

			phys = <&combphy1_psu PHY_TYPE_PCIE>;

			phy-names = "pcie-phy";

			power-domains = <&power RK3576_PD_SUBPHP>;

			ranges = <0x01000000 0x0 0x21100000 0x0 0x21100000 0x0 0x00100000

				  0x02000000 0x0 0x21200000 0x0 0x21200000 0x0 0x00e00000

				  0x03000000 0x9 0x80000000 0x9 0x80000000 0x0 0x80000000>;

			resets = <&cru SRST_PCIE1_POWER_UP>, <&cru SRST_P_PCIE1>;

			reset-names = "pwr", "pipe";

			#address-cells = <3>;

			#size-cells = <2>;

			status = "disabled";



			pcie1_intc: legacy-interrupt-controller {

				interrupt-controller;

				#address-cells = <0>;

				#interrupt-cells = <1>;

				interrupt-parent = <&gic>;

				interrupts = <GIC_SPI 266 IRQ_TYPE_EDGE_RISING>;

			};

		};



		gmac0: ethernet@2a220000 {

			compatible = "rockchip,rk3576-gmac", "snps,dwmac-4.20a";

			reg = <0x0 0x2a220000 0x0 0x10000>;