Commit d566fc42 authored by Iswara Nagulendran's avatar Iswara Nagulendran Committed by Alex Deucher
Browse files

drm/amd/display: Add VC for VESA Aux Backlight Control 



[WHY]
There is no way to distinguish
the static backlight control type
being used and the VABC support
without the use of a debugger or
reading DPCD registers.

[HOW]
Add Visual Confirm support
for VESA Aux-based Backlight Control.

Reviewed-by: default avatarHarry Vanzylldejong <harry.vanzylldejong@amd.com>
Signed-off-by: default avatarIswara Nagulendran <Iswara.Nagulendran@amd.com>
Signed-off-by: default avatarRoman Li <roman.li@amd.com>
Tested-by: default avatarDaniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 41c18333

drivers/gpu/drm/amd/display/dc/core/dc.c

+2 −0
Original line number Diff line number Diff line
@@ -1236,6 +1236,8 @@ static void dc_update_visual_confirm_color(struct dc *dc, struct dc_state *conte 
				get_mclk_switch_visual_confirm_color(pipe_ctx, &(pipe_ctx->visual_confirm_color));

			else if (dc->debug.visual_confirm == VISUAL_CONFIRM_FAMS2)

				get_fams2_visual_confirm_color(dc, context, pipe_ctx, &(pipe_ctx->visual_confirm_color));

			else if (dc->debug.visual_confirm == VISUAL_CONFIRM_VABC)

				get_vabc_visual_confirm_color(pipe_ctx, &(pipe_ctx->visual_confirm_color));

		}

	}

}

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

+38 −0
Original line number Diff line number Diff line
@@ -425,6 +425,44 @@ void get_hdr_visual_confirm_color( 
	}

}



/* Visual Confirm color definition for VABC */

void get_vabc_visual_confirm_color(

	struct pipe_ctx *pipe_ctx,

	struct tg_color *color)

{

	uint32_t color_value = MAX_TG_COLOR_VALUE;

	struct dc_link *edp_link = NULL;



	if (pipe_ctx && pipe_ctx->stream && pipe_ctx->stream->link) {

		if (pipe_ctx->stream->link->connector_signal == SIGNAL_TYPE_EDP)

			edp_link = pipe_ctx->stream->link;

	}



	if (edp_link) {

		switch (edp_link->backlight_control_type) {

		case BACKLIGHT_CONTROL_PWM:

			color->color_r_cr = color_value;

			color->color_g_y = 0;

			color->color_b_cb = 0;

			break;

		case BACKLIGHT_CONTROL_AMD_AUX:

			color->color_r_cr = 0;

			color->color_g_y = color_value;

			color->color_b_cb = 0;

			break;

		case BACKLIGHT_CONTROL_VESA_AUX:

			color->color_r_cr = 0;

			color->color_g_y = 0;

			color->color_b_cb = color_value;

			break;

		}

	} else {

		color->color_r_cr = 0;

		color->color_g_y = 0;

		color->color_b_cb = 0;

	}

}



void get_subvp_visual_confirm_color(

		struct pipe_ctx *pipe_ctx,

		struct tg_color *color)

drivers/gpu/drm/amd/display/dc/dc.h

+1 −0
Original line number Diff line number Diff line
@@ -489,6 +489,7 @@ enum visual_confirm { 
	VISUAL_CONFIRM_MCLK_SWITCH = 16,

	VISUAL_CONFIRM_FAMS2 = 19,

	VISUAL_CONFIRM_HW_CURSOR = 20,

	VISUAL_CONFIRM_VABC = 21,

};



enum dc_psr_power_opts {

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

+3 −3
Original line number Diff line number Diff line
@@ -194,7 +194,6 @@ enum block_sequence_func { 
	DMUB_SUBVP_SAVE_SURF_ADDR,

	HUBP_WAIT_FOR_DCC_META_PROP,

	DMUB_FAMS2_GLOBAL_CONTROL_LOCK_FAST,



};



struct block_sequence {
@@ -485,11 +484,12 @@ void get_hdr_visual_confirm_color( 
void get_mpctree_visual_confirm_color(

		struct pipe_ctx *pipe_ctx,

		struct tg_color *color);



void get_vabc_visual_confirm_color(

	struct pipe_ctx *pipe_ctx,

	struct tg_color *color);

void get_subvp_visual_confirm_color(

	struct pipe_ctx *pipe_ctx,

	struct tg_color *color);



void get_fams2_visual_confirm_color(

	struct dc *dc,

	struct dc_state *context,