Commit d6c5bac8 authored by Michal Wajdeczko's avatar Michal Wajdeczko
Browse files

drm/xe/pf: Re-initialize SR-IOV specific HW settings 



On older platforms (12.00) the PF driver must explicitly unblock
VF's modifications to the GGTT. On newer platforms this capability
is enabled by default.

Bspec: 49908, 53204
Signed-off-by: default avatarMichal Wajdeczko <michal.wajdeczko@intel.com>
Reviewed-by: default avatarPiotr Piórkowski <piotr.piorkowski@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240425143927.2265-1-michal.wajdeczko@intel.com
parent c832541c

drivers/gpu/drm/xe/regs/xe_sriov_regs.h

+3 −0
Original line number Diff line number Diff line
@@ -14,6 +14,9 @@ 
#define   LMEM_EN			REG_BIT(31)

#define   LMTT_DIR_PTR			REG_GENMASK(30, 0) /* in multiples of 64KB */



#define VIRTUAL_CTRL_REG		XE_REG(0x10108c)

#define   GUEST_GTT_UPDATE_EN		REG_BIT(8)



#define VF_CAP_REG			XE_REG(0x1901f8, XE_REG_OPTION_VF)

#define   VF_CAP			REG_BIT(0)

drivers/gpu/drm/xe/xe_gt.c

+6 −0
Original line number Diff line number Diff line
@@ -477,6 +477,9 @@ static int all_fw_domain_init(struct xe_gt *gt) 
	if (IS_SRIOV_PF(gt_to_xe(gt)) && !xe_gt_is_media_type(gt))

		xe_lmtt_init_hw(&gt_to_tile(gt)->sriov.pf.lmtt);



	if (IS_SRIOV_PF(gt_to_xe(gt)))

		xe_gt_sriov_pf_init_hw(gt);



	err = xe_force_wake_put(gt_to_fw(gt), XE_FORCEWAKE_ALL);

	XE_WARN_ON(err);
@@ -613,6 +616,9 @@ static int do_gt_restart(struct xe_gt *gt) 
	if (IS_SRIOV_PF(gt_to_xe(gt)) && !xe_gt_is_media_type(gt))

		xe_lmtt_init_hw(&gt_to_tile(gt)->sriov.pf.lmtt);



	if (IS_SRIOV_PF(gt_to_xe(gt)))

		xe_gt_sriov_pf_init_hw(gt);



	xe_mocs_init(gt);

	err = xe_uc_start(&gt->uc);

	if (err)

drivers/gpu/drm/xe/xe_gt_sriov_pf.c

+25 −0
Original line number Diff line number Diff line
@@ -5,8 +5,11 @@ 


#include <drm/drm_managed.h>



#include "regs/xe_sriov_regs.h"



#include "xe_gt_sriov_pf.h"

#include "xe_gt_sriov_pf_helpers.h"

#include "xe_mmio.h"



/*

 * VF's metadata is maintained in the flexible array where:
@@ -50,3 +53,25 @@ int xe_gt_sriov_pf_init_early(struct xe_gt *gt) 


	return 0;

}



static bool pf_needs_enable_ggtt_guest_update(struct xe_device *xe)

{

	return GRAPHICS_VERx100(xe) == 1200;

}



static void pf_enable_ggtt_guest_update(struct xe_gt *gt)

{

	xe_mmio_write32(gt, VIRTUAL_CTRL_REG, GUEST_GTT_UPDATE_EN);

}



/**

 * xe_gt_sriov_pf_init_hw - Initialize SR-IOV hardware support.

 * @gt: the &xe_gt to initialize

 *

 * On some platforms the PF must explicitly enable VF's access to the GGTT.

 */

void xe_gt_sriov_pf_init_hw(struct xe_gt *gt)

{

	if (pf_needs_enable_ggtt_guest_update(gt_to_xe(gt)))

		pf_enable_ggtt_guest_update(gt);

}

drivers/gpu/drm/xe/xe_gt_sriov_pf.h

+5 −0
Original line number Diff line number Diff line
@@ -10,11 +10,16 @@ struct xe_gt; 


#ifdef CONFIG_PCI_IOV

int xe_gt_sriov_pf_init_early(struct xe_gt *gt);

void xe_gt_sriov_pf_init_hw(struct xe_gt *gt);

#else

static inline int xe_gt_sriov_pf_init_early(struct xe_gt *gt)

{

	return 0;

}



static inline void xe_gt_sriov_pf_init_hw(struct xe_gt *gt)

{

}

#endif



#endif