Commit d752e211 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'x86_cpu_for_v5.18_rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip

Pull x86 cpu feature updates from Borislav Petkov:

 - Merge the AMD and Intel PPIN code into a shared one by both vendors.
   Add the PPIN number to sysfs so that sockets can be identified when
   replacement is needed

 - Minor fixes and cleanups

* tag 'x86_cpu_for_v5.18_rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  x86/cpu: Clear SME feature flag when not in use
  x86/cpufeatures: Put the AMX macros in the word 18 block
  topology/sysfs: Add PPIN in sysfs under cpu topology
  topology/sysfs: Add format parameter to macro defining "show" functions for proc
  x86/cpu: Read/save PPIN MSR during initialization
  x86/cpu: X86_FEATURE_INTEL_PPIN finally has a CPUID bit
  x86/cpu: Merge Intel and AMD ppin_init() functions
  x86/CPU/AMD: Use default_groups in kobj_type
parents 5e891917 08f253ec
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@@ -86,6 +86,10 @@ What: /sys/devices/system/cpu/cpuX/topology/die_cpus
Description:    internal kernel map of CPUs within the same die.
Values:         hexadecimal bitmask.

What:           /sys/devices/system/cpu/cpuX/topology/ppin
Description:    per-socket protected processor inventory number
Values:         hexadecimal.

What:           /sys/devices/system/cpu/cpuX/topology/die_cpus_list
Description:    human-readable list of CPUs within the same die.
                The format is like 0-3, 8-11, 14,17.
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@@ -73,6 +73,7 @@ What: /sys/devices/system/cpu/cpuX/topology/core_id
		/sys/devices/system/cpu/cpuX/topology/physical_package_id
		/sys/devices/system/cpu/cpuX/topology/thread_siblings
		/sys/devices/system/cpu/cpuX/topology/thread_siblings_list
		/sys/devices/system/cpu/cpuX/topology/ppin
Date:		December 2008
Contact:	Linux kernel mailing list <linux-kernel@vger.kernel.org>
Description:	CPU topology files that describe a logical CPU's relationship
@@ -103,6 +104,11 @@ Description: CPU topology files that describe a logical CPU's relationship
		thread_siblings_list: human-readable list of cpuX's hardware
		threads within the same core as cpuX

		ppin: human-readable Protected Processor Identification
		Number of the socket the cpu# belongs to. There should be
		one per physical_package_id. File is readable only to
		admin.

		See Documentation/admin-guide/cputopology.rst for more information.


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@@ -299,9 +299,6 @@
/* Intel-defined CPU features, CPUID level 0x00000007:1 (EAX), word 12 */
#define X86_FEATURE_AVX_VNNI		(12*32+ 4) /* AVX VNNI instructions */
#define X86_FEATURE_AVX512_BF16		(12*32+ 5) /* AVX512 BFLOAT16 instructions */
#define X86_FEATURE_AMX_BF16		(18*32+22) /* AMX bf16 Support */
#define X86_FEATURE_AMX_TILE		(18*32+24) /* AMX tile Support */
#define X86_FEATURE_AMX_INT8		(18*32+25) /* AMX int8 Support */

/* AMD-defined CPU features, CPUID level 0x80000008 (EBX), word 13 */
#define X86_FEATURE_CLZERO		(13*32+ 0) /* CLZERO instruction */
@@ -390,7 +387,10 @@
#define X86_FEATURE_TSXLDTRK		(18*32+16) /* TSX Suspend Load Address Tracking */
#define X86_FEATURE_PCONFIG		(18*32+18) /* Intel PCONFIG */
#define X86_FEATURE_ARCH_LBR		(18*32+19) /* Intel ARCH LBR */
#define X86_FEATURE_AMX_BF16		(18*32+22) /* AMX bf16 Support */
#define X86_FEATURE_AVX512_FP16		(18*32+23) /* AVX512 FP16 */
#define X86_FEATURE_AMX_TILE		(18*32+24) /* AMX tile Support */
#define X86_FEATURE_AMX_INT8		(18*32+25) /* AMX int8 Support */
#define X86_FEATURE_SPEC_CTRL		(18*32+26) /* "" Speculation Control (IBRS + IBPB) */
#define X86_FEATURE_INTEL_STIBP		(18*32+27) /* "" Single Thread Indirect Branch Predictors */
#define X86_FEATURE_FLUSH_L1D		(18*32+28) /* Flush L1D cache */
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@@ -119,6 +119,8 @@ struct cpuinfo_x86 {
	int			x86_cache_mbm_width_offset;
	int			x86_power;
	unsigned long		loops_per_jiffy;
	/* protected processor identification number */
	u64			ppin;
	/* cpuid returned max cores value: */
	u16			x86_max_cores;
	u16			apicid;
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@@ -110,6 +110,7 @@ extern const struct cpumask *cpu_clustergroup_mask(int cpu);
#define topology_logical_die_id(cpu)		(cpu_data(cpu).logical_die_id)
#define topology_die_id(cpu)			(cpu_data(cpu).cpu_die_id)
#define topology_core_id(cpu)			(cpu_data(cpu).cpu_core_id)
#define topology_ppin(cpu)			(cpu_data(cpu).ppin)

extern unsigned int __max_die_per_package;

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