Commit d78a14de authored by Marc Zyngier's avatar Marc Zyngier
Browse files

KVM: arm64: Handle FEAT_IDST for sysregs without specific handlers 



Add a bit of infrastrtcture to triage_sysreg_trap() to handle the
case of registers falling into the Feature ID space that do not
have a local handler.

For these, we can directly apply the FEAT_IDST semantics and inject
an EC=0x18 exception. Otherwise, an UNDEF will do.

Reviewed-by: default avatarJoey Gouly <joey.gouly@arm.com>
Reviewed-by: default avatarYuan Yao <yaoyuan@linux.alibaba.com>
Link: https://patch.msgid.link/20260108173233.2911955-5-maz@kernel.org


Signed-off-by: default avatarMarc Zyngier <maz@kernel.org>
parent 19f75678

arch/arm64/kvm/emulate-nested.c

+13 −0
Original line number Diff line number Diff line
@@ -2588,6 +2588,19 @@ bool triage_sysreg_trap(struct kvm_vcpu *vcpu, int *sr_index) 


		params = esr_sys64_to_params(esr);



		/*

		 * This implements the pseudocode UnimplementedIDRegister()

		 * helper for the purpose of dealing with FEAT_IDST.

		 */

		if (in_feat_id_space(&params)) {

			if (kvm_has_feat(vcpu->kvm, ID_AA64MMFR2_EL1, IDS, IMP))

				kvm_inject_sync(vcpu, kvm_vcpu_get_esr(vcpu));

			else

				kvm_inject_undefined(vcpu);



			return true;

		}



		/*

		 * Check for the IMPDEF range, as per DDI0487 J.a,

		 * D18.3.2 Reserved encodings for IMPLEMENTATION

arch/arm64/kvm/sys_regs.h

+10 −0
Original line number Diff line number Diff line
@@ -49,6 +49,16 @@ struct sys_reg_params { 
				  .Op2 = ((esr) >> 17) & 0x7,			\

				  .is_write = !((esr) & 1) })



/*

 * The Feature ID space is defined as the System register space in AArch64

 * with op0==3, op1=={0, 1, 3}, CRn==0, CRm=={0-7}, op2=={0-7}.

 */

static inline bool in_feat_id_space(struct sys_reg_params *p)

{

	return (p->Op0 == 3 && !(p->Op1 & 0b100) && p->Op1 != 2 &&

		p->CRn == 0 && !(p->CRm & 0b1000));

}



struct sys_reg_desc {

	/* Sysreg string for debug */

	const char *name;