Commit d81cadbe authored by Suravee Suthikulpanit's avatar Suravee Suthikulpanit Committed by Sean Christopherson
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KVM: SVM: Disable AVIC on SNP-enabled system without HvInUseWrAllowed feature 

On SNP-enabled system, VMRUN marks AVIC Backing Page as in-use while
the guest is running for both secure and non-secure guest. Any hypervisor
write to the in-use vCPU's AVIC backing page (e.g. to inject an interrupt)
will generate unexpected #PF in the host.

Currently, attempt to run AVIC guest would result in the following error:

    BUG: unable to handle page fault for address: ff3a442e549cc270
    #PF: supervisor write access in kernel mode
    #PF: error_code(0x80000003) - RMP violation
    PGD b6ee01067 P4D b6ee02067 PUD 10096d063 PMD 11c540063 PTE 80000001149cc163
    SEV-SNP: PFN 0x1149cc unassigned, dumping non-zero entries in 2M PFN region: [0x114800 - 0x114a00]
    ...

Newer AMD system is enhanced to allow hypervisor to modify the backing page
for non-secure guest on SNP-enabled system. This enhancement is available
when the CPUID Fn8000_001F_EAX bit 30 is set (HvInUseWrAllowed).

This table describes AVIC support matrix w.r.t. SNP enablement:

               | Non-SNP system |     SNP system
-----------------------------------------------------
 Non-SNP guest |  AVIC Activate | AVIC Activate iff
               |                | HvInuseWrAllowed=1
-----------------------------------------------------
     SNP guest |      N/A       |    Secure AVIC

Therefore, check and disable AVIC in kvm_amd driver when the feature is not
available on SNP-enabled system.

See the AMD64 Architecture Programmer’s Manual (APM) Volume 2 for detail.
(https://www.amd.com/content/dam/amd/en/documents/processor-tech-docs/


programmer-references/40332.pdf)

Fixes: 216d106c ("x86/sev: Add SEV-SNP host initialization support")
Signed-off-by: default avatarSuravee Suthikulpanit <suravee.suthikulpanit@amd.com>
Link: https://lore.kernel.org/r/20241104075845.7583-1-suravee.suthikulpanit@amd.com


Signed-off-by: default avatarSean Christopherson <seanjc@google.com>
parent 7d405072

arch/x86/include/asm/cpufeatures.h

+1 −0
Original line number Diff line number Diff line
@@ -452,6 +452,7 @@ 
#define X86_FEATURE_SME_COHERENT	(19*32+10) /* AMD hardware-enforced cache coherency */

#define X86_FEATURE_DEBUG_SWAP		(19*32+14) /* "debug_swap" AMD SEV-ES full debug state swap support */

#define X86_FEATURE_SVSM		(19*32+28) /* "svsm" SVSM present */

#define X86_FEATURE_HV_INUSE_WR_ALLOWED	(19*32+30) /* Allow Write to in-use hypervisor-owned pages */



/* AMD-defined Extended Feature 2 EAX, CPUID level 0x80000021 (EAX), word 20 */

#define X86_FEATURE_NO_NESTED_DATA_BP	(20*32+ 0) /* No Nested Data Breakpoints */

arch/x86/kvm/svm/avic.c

+6 −0
Original line number Diff line number Diff line
@@ -1199,6 +1199,12 @@ bool avic_hardware_setup(void) 
		return false;

	}



	if (cc_platform_has(CC_ATTR_HOST_SEV_SNP) &&

	    !boot_cpu_has(X86_FEATURE_HV_INUSE_WR_ALLOWED)) {

		pr_warn("AVIC disabled: missing HvInUseWrAllowed on SNP-enabled system\n");

		return false;

	}



	if (boot_cpu_has(X86_FEATURE_AVIC)) {

		pr_info("AVIC enabled\n");

	} else if (force_avic) {