Commit d895dbef authored by Andy Yan's avatar Andy Yan Committed by Heiko Stuebner
Browse files

arm64: dts: rockchip: Add vop on rk3588 



Add vop dt node for rk3588.

Signed-off-by: default avatarAndy Yan <andy.yan@rock-chips.com>
Link: https://lore.kernel.org/r/20231211120004.1785616-1-andyshrk@163.com


Signed-off-by: default avatarHeiko Stuebner <heiko@sntech.de>
parent 1a648f8b

arch/arm64/boot/dts/rockchip/rk3588s.dtsi

+83 −0
Original line number Diff line number Diff line
@@ -394,6 +394,11 @@ spll: clock-0 { 
		#clock-cells = <0>;

	};



	display_subsystem: display-subsystem {

		compatible = "rockchip,display-subsystem";

		ports = <&vop_out>;

	};



	timer {

		compatible = "arm,armv8-timer";

		interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH 0>,
@@ -506,6 +511,16 @@ sys_grf: syscon@fd58c000 { 
		reg = <0x0 0xfd58c000 0x0 0x1000>;

	};



	vop_grf: syscon@fd5a4000 {

		compatible = "rockchip,rk3588-vop-grf", "syscon";

		reg = <0x0 0xfd5a4000 0x0 0x2000>;

	};



	vo1_grf: syscon@fd5a8000 {

		compatible = "rockchip,rk3588-vo-grf", "syscon";

		reg = <0x0 0xfd5a8000 0x0 0x100>;

	};



	php_grf: syscon@fd5b0000 {

		compatible = "rockchip,rk3588-php-grf", "syscon";

		reg = <0x0 0xfd5b0000 0x0 0x1000>;
@@ -625,6 +640,74 @@ i2c0: i2c@fd880000 { 
		status = "disabled";

	};



	vop: vop@fdd90000 {

		compatible = "rockchip,rk3588-vop";

		reg = <0x0 0xfdd90000 0x0 0x4200>, <0x0 0xfdd95000 0x0 0x1000>;

		reg-names = "vop", "gamma-lut";

		interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH 0>;

		clocks = <&cru ACLK_VOP>,

			 <&cru HCLK_VOP>,

			 <&cru DCLK_VOP0>,

			 <&cru DCLK_VOP1>,

			 <&cru DCLK_VOP2>,

			 <&cru DCLK_VOP3>,

			 <&cru PCLK_VOP_ROOT>;

		clock-names = "aclk",

			      "hclk",

			      "dclk_vp0",

			      "dclk_vp1",

			      "dclk_vp2",

			      "dclk_vp3",

			      "pclk_vop";

		iommus = <&vop_mmu>;

		power-domains = <&power RK3588_PD_VOP>;

		rockchip,grf = <&sys_grf>;

		rockchip,vop-grf = <&vop_grf>;

		rockchip,vo1-grf = <&vo1_grf>;

		rockchip,pmu = <&pmu>;

		status = "disabled";



		vop_out: ports {

			#address-cells = <1>;

			#size-cells = <0>;



			vp0: port@0 {

				#address-cells = <1>;

				#size-cells = <0>;

				reg = <0>;

			};



			vp1: port@1 {

				#address-cells = <1>;

				#size-cells = <0>;

				reg = <1>;

			};



			vp2: port@2 {

				#address-cells = <1>;

				#size-cells = <0>;

				reg = <2>;

			};



			vp3: port@3 {

				#address-cells = <1>;

				#size-cells = <0>;

				reg = <3>;

			};

		};

	};



	vop_mmu: iommu@fdd97e00 {

		compatible = "rockchip,rk3588-iommu", "rockchip,rk3568-iommu";

		reg = <0x0 0xfdd97e00 0x0 0x100>, <0x0 0xfdd97f00 0x0 0x100>;

		interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH 0>;

		clocks = <&cru ACLK_VOP>, <&cru HCLK_VOP>;

		clock-names = "aclk", "iface";

		#iommu-cells = <0>;

		power-domains = <&power RK3588_PD_VOP>;

		status = "disabled";

	};



	uart0: serial@fd890000 {

		compatible = "rockchip,rk3588-uart", "snps,dw-apb-uart";

		reg = <0x0 0xfd890000 0x0 0x100>;