Commit d8a9ea5d authored by Krzysztof Kozlowski's avatar Krzysztof Kozlowski Committed by Rob Herring (Arm)
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media: dt-bindings: renesas,vsp1: add top-level constraints



Properties with variable number of items per each device are expected to
have widest constraints in top-level "properties:" block and further
customized (narrowed) in "if:then:".  Add missing top-level constraints
for clocks and clock-names.

Acked-by: default avatarConor Dooley <conor.dooley@microchip.com>
Signed-off-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20250501173411.134130-4-krzysztof.kozlowski@linaro.org


Signed-off-by: default avatarRob Herring (Arm) <robh@kernel.org>
parent 31b6c343
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+13 −11
Original line number Diff line number Diff line
@@ -33,8 +33,18 @@ properties:
  interrupts:
    maxItems: 1

  clocks: true
  clock-names: true
  clocks:
    minItems: 1
    items:
      - description: Main clock
      - description: Register access clock
      - description: Video clock

  clock-names:
    items:
      - const: aclk
      - const: pclk
      - const: vclk

  power-domains:
    maxItems: 1
@@ -78,15 +88,7 @@ allOf:
    then:
      properties:
        clocks:
          items:
            - description: Main clock
            - description: Register access clock
            - description: Video clock
        clock-names:
          items:
            - const: aclk
            - const: pclk
            - const: vclk
          minItems: 3
      required:
        - clock-names
    else: