Commit da1878b6 authored by Dnyaneshwar Bhadane's avatar Dnyaneshwar Bhadane Committed by Jani Nikula
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drm/i915/display: correct dual pps handling for MTL_PCH+

On the PCH side the second PPS was introduced in ICP+.Add condition
On MTL_PCH and greater platform also having the second PPS.

Note that DG1/2 south block only has the single PPS, so need
to exclude the fake DG1/2 PCHs

Closes: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11488


Fixes: 93cbc1ac ("drm/i915/mtl: Add fake PCH for Meteor Lake")
Cc: <stable@vger.kernel.org> # v6.9+
Signed-off-by: default avatarDnyaneshwar Bhadane <dnyaneshwar.bhadane@intel.com>
Reviewed-by: default avatarJani Nikula <jani.nikula@intel.com>
Signed-off-by: default avatarJani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240801111141.574854-1-dnyaneshwar.bhadane@intel.com
parent c0e0bde2
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+3 −0
Original line number Diff line number Diff line
@@ -1449,6 +1449,9 @@ bxt_setup_backlight(struct intel_connector *connector, enum pipe unused)

static int cnp_num_backlight_controllers(struct drm_i915_private *i915)
{
	if (INTEL_PCH_TYPE(i915) >= PCH_MTL)
		return 2;

	if (INTEL_PCH_TYPE(i915) >= PCH_DG1)
		return 1;

+3 −0
Original line number Diff line number Diff line
@@ -351,6 +351,9 @@ static int intel_num_pps(struct drm_i915_private *i915)
	if (IS_GEMINILAKE(i915) || IS_BROXTON(i915))
		return 2;

	if (INTEL_PCH_TYPE(i915) >= PCH_MTL)
		return 2;

	if (INTEL_PCH_TYPE(i915) >= PCH_DG1)
		return 1;