Commit da55037a authored by Austin Zheng's avatar Austin Zheng Committed by Alex Deucher
Browse files

drm/amd/display: Limit Minimum FreeSync Refresh Rate 



Why:
Some EDIDs report a minimum refresh rate lower than what HW can support

How:
Add a check to calculate minimum supported refresh rate with current timing
and use that as the minimum if a lower one is passed in

Acked-by: default avatarStylon Wang <stylon.wang@amd.com>
Signed-off-by: default avatarAustin Zheng <austin.zheng@amd.com>
Reviewed-by: default avatarAnthony Koo <Anthony.Koo@amd.com>
Tested-by: default avatarDaniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent ec7282bd

drivers/gpu/drm/amd/display/dc/dc.h

+1 −0
Original line number Diff line number Diff line
@@ -266,6 +266,7 @@ struct dc_caps { 
	uint16_t subvp_pstate_allow_width_us;

	uint16_t subvp_vertical_int_margin_us;

	bool seamless_odm;

	uint32_t max_v_total;

	uint8_t subvp_drr_vblank_start_margin_us;

};

drivers/gpu/drm/amd/display/dc/dcn30/dcn30_resource.c

+1 −0
Original line number Diff line number Diff line
@@ -2328,6 +2328,7 @@ static bool dcn30_resource_construct( 
	dc->caps.color.mpc.ocsc = 1;



	dc->caps.dp_hdmi21_pcon_support = true;

	dc->caps.max_v_total = (1 << 15) - 1;



	/* read VBIOS LTTPR caps */

	{

drivers/gpu/drm/amd/display/dc/dcn302/dcn302_resource.c

+1 −0
Original line number Diff line number Diff line
@@ -1227,6 +1227,7 @@ static bool dcn302_resource_construct( 
	dc->caps.force_dp_tps4_for_cp2520 = true;

	dc->caps.extended_aux_timeout_support = true;

	dc->caps.dmcub_support = true;

	dc->caps.max_v_total = (1 << 15) - 1;



	/* Color pipeline capabilities */

	dc->caps.color.dpp.dcn_arch = 1;

drivers/gpu/drm/amd/display/dc/dcn303/dcn303_resource.c

+1 −0
Original line number Diff line number Diff line
@@ -1152,6 +1152,7 @@ static bool dcn303_resource_construct( 
	dc->caps.force_dp_tps4_for_cp2520 = true;

	dc->caps.extended_aux_timeout_support = true;

	dc->caps.dmcub_support = true;

	dc->caps.max_v_total = (1 << 15) - 1;



	/* Color pipeline capabilities */

	dc->caps.color.dpp.dcn_arch = 1;

drivers/gpu/drm/amd/display/dc/dcn32/dcn32_resource.c

+1 −0
Original line number Diff line number Diff line
@@ -2175,6 +2175,7 @@ static bool dcn32_resource_construct( 
	dc->caps.extended_aux_timeout_support = true;

	dc->caps.dmcub_support = true;

	dc->caps.seamless_odm = true;

	dc->caps.max_v_total = (1 << 15) - 1;



	/* Color pipeline capabilities */

	dc->caps.color.dpp.dcn_arch = 1;