Commit daafa303 authored by Apurv Mishra's avatar Apurv Mishra Committed by Alex Deucher
Browse files

drm/amdkfd: Drop workaround for GC v9.4.3 revID 0



Remove workaround code for the early engineering
samples GC v9.4.3 SOCs with revID 0

Reviewed-by: default avatarAmber Lin <Amber.Lin@amd.com>
Signed-off-by: default avatarApurv Mishra <Apurv.Mishra@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent ca690c7e
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+7 −1
Original line number Diff line number Diff line
@@ -2692,6 +2692,13 @@ static int amdgpu_device_ip_early_init(struct amdgpu_device *adev)
		break;
	}

	/* Check for IP version 9.4.3 with A0 hardware */
	if (amdgpu_ip_version(adev, GC_HWIP, 0) == IP_VERSION(9, 4, 3) &&
	    !amdgpu_device_get_rev_id(adev)) {
		dev_err(adev->dev, "Unsupported A0 hardware\n");
		return -ENODEV;	/* device unsupported - no device error */
	}

	if (amdgpu_has_atpx() &&
	    (amdgpu_is_atpx_hybrid() ||
	     amdgpu_has_atpx_dgpu_power_cntl()) &&
@@ -2704,7 +2711,6 @@ static int amdgpu_device_ip_early_init(struct amdgpu_device *adev)
		adev->has_pr3 = parent ? pci_pr3_present(parent) : false;
	}


	adev->pm.pp_feature = amdgpu_pp_feature_mask;
	if (amdgpu_sriov_vf(adev) || sched_policy == KFD_SCHED_POLICY_NO_HWS)
		adev->pm.pp_feature &= ~PP_GFXOFF_MASK;
+2 −12
Original line number Diff line number Diff line
@@ -1213,10 +1213,7 @@ static void gmc_v9_0_get_coherence_flags(struct amdgpu_device *adev,
		if (uncached) {
			mtype = MTYPE_UC;
		} else if (ext_coherent) {
			if (gc_ip_version == IP_VERSION(9, 5, 0) || adev->rev_id)
			mtype = is_local ? MTYPE_CC : MTYPE_UC;
			else
				mtype = MTYPE_UC;
		} else if (adev->flags & AMD_IS_APU) {
			mtype = is_local ? mtype_local : MTYPE_NC;
		} else {
@@ -1336,7 +1333,7 @@ static void gmc_v9_0_override_vm_pte_flags(struct amdgpu_device *adev,
				mtype_local = MTYPE_CC;

			*flags = AMDGPU_PTE_MTYPE_VG10(*flags, mtype_local);
		} else if (adev->rev_id) {
		} else {
			/* MTYPE_UC case */
			*flags = AMDGPU_PTE_MTYPE_VG10(*flags, MTYPE_CC);
		}
@@ -2411,13 +2408,6 @@ static int gmc_v9_0_hw_init(struct amdgpu_ip_block *ip_block)
	adev->gmc.flush_tlb_needs_extra_type_2 =
		amdgpu_ip_version(adev, GC_HWIP, 0) == IP_VERSION(9, 4, 0) &&
		adev->gmc.xgmi.num_physical_nodes;
	/*
	 * TODO: This workaround is badly documented and had a buggy
	 * implementation. We should probably verify what we do here.
	 */
	adev->gmc.flush_tlb_needs_extra_type_0 =
		amdgpu_ip_version(adev, GC_HWIP, 0) == IP_VERSION(9, 4, 3) &&
		adev->rev_id == 0;

	/* The sequence of these two function calls matters.*/
	gmc_v9_0_init_golden_registers(adev);
+0 −5
Original line number Diff line number Diff line
@@ -352,11 +352,6 @@ struct kfd_dev *kgd2kfd_probe(struct amdgpu_device *adev, bool vf)
			f2g = &aldebaran_kfd2kgd;
			break;
		case IP_VERSION(9, 4, 3):
			gfx_target_version = adev->rev_id >= 1 ? 90402
					   : adev->flags & AMD_IS_APU ? 90400
					   : 90401;
			f2g = &gc_9_4_3_kfd2kgd;
			break;
		case IP_VERSION(9, 4, 4):
			gfx_target_version = 90402;
			f2g = &gc_9_4_3_kfd2kgd;
+2 −2
Original line number Diff line number Diff line
@@ -402,7 +402,7 @@ static u32 kfd_get_vgpr_size_per_cu(u32 gfxv)
{
	u32 vgpr_size = 0x40000;

	if ((gfxv / 100 * 100) == 90400 ||	/* GFX_VERSION_AQUA_VANJARAM */
	if (gfxv == 90402 ||			/* GFX_VERSION_AQUA_VANJARAM */
	    gfxv == 90010 ||			/* GFX_VERSION_ALDEBARAN */
	    gfxv == 90008 ||			/* GFX_VERSION_ARCTURUS */
	    gfxv == 90500)
@@ -462,7 +462,7 @@ void kfd_queue_ctx_save_restore_size(struct kfd_topology_device *dev)

	if (gfxv == 80002)	/* GFX_VERSION_TONGA */
		props->eop_buffer_size = 0x8000;
	else if ((gfxv / 100 * 100) == 90400)	/* GFX_VERSION_AQUA_VANJARAM */
	else if (gfxv == 90402)	/* GFX_VERSION_AQUA_VANJARAM */
		props->eop_buffer_size = 4096;
	else if (gfxv >= 80000)
		props->eop_buffer_size = 4096;
+1 −2
Original line number Diff line number Diff line
@@ -1245,8 +1245,7 @@ svm_range_get_pte_flags(struct kfd_node *node,
	case IP_VERSION(9, 4, 4):
	case IP_VERSION(9, 5, 0):
		if (ext_coherent)
			mtype_local = (gc_ip_version < IP_VERSION(9, 5, 0) && !node->adev->rev_id) ?
					AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_CC;
			mtype_local = AMDGPU_VM_MTYPE_CC;
		else
			mtype_local = amdgpu_mtype_local == 1 ? AMDGPU_VM_MTYPE_NC :
				amdgpu_mtype_local == 2 ? AMDGPU_VM_MTYPE_CC : AMDGPU_VM_MTYPE_RW;