Commit db12ee08 authored by Prathamesh Shete's avatar Prathamesh Shete Committed by Bartosz Golaszewski
Browse files

gpio: tegra186: Add support for Tegra256



Extend the existing Tegra186 GPIO controller driver with support for the
GPIO controller found on Tegra256. While the programming model remains
the same, the number of pins has slightly changed.

Signed-off-by: default avatarPrathamesh Shete <pshete@nvidia.com>
Link: https://lore.kernel.org/r/20250823055420.24664-2-pshete@nvidia.com


Signed-off-by: default avatarBartosz Golaszewski <bartosz.golaszewski@linaro.org>
parent eef6dcbc
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+28 −0
Original line number Diff line number Diff line
@@ -20,6 +20,7 @@
#include <dt-bindings/gpio/tegra194-gpio.h>
#include <dt-bindings/gpio/tegra234-gpio.h>
#include <dt-bindings/gpio/tegra241-gpio.h>
#include <dt-bindings/gpio/tegra256-gpio.h>

/* security registers */
#define TEGRA186_GPIO_CTL_SCR 0x0c
@@ -1279,6 +1280,30 @@ static const struct tegra_gpio_soc tegra241_aon_soc = {
	.has_vm_support = false,
};

#define TEGRA256_MAIN_GPIO_PORT(_name, _bank, _port, _pins)	\
	[TEGRA256_MAIN_GPIO_PORT_##_name] = {			\
		.name = #_name,					\
		.bank = _bank,					\
		.port = _port,					\
		.pins = _pins,					\
	}

static const struct tegra_gpio_port tegra256_main_ports[] = {
	TEGRA256_MAIN_GPIO_PORT(A, 0, 0, 8),
	TEGRA256_MAIN_GPIO_PORT(B, 0, 1, 8),
	TEGRA256_MAIN_GPIO_PORT(C, 0, 2, 8),
	TEGRA256_MAIN_GPIO_PORT(D, 0, 3, 8),
};

static const struct tegra_gpio_soc tegra256_main_soc = {
	.num_ports = ARRAY_SIZE(tegra256_main_ports),
	.ports = tegra256_main_ports,
	.name = "tegra256-gpio-main",
	.instance = 1,
	.num_irqs_per_bank = 8,
	.has_vm_support = true,
};

static const struct of_device_id tegra186_gpio_of_match[] = {
	{
		.compatible = "nvidia,tegra186-gpio",
@@ -1298,6 +1323,9 @@ static const struct of_device_id tegra186_gpio_of_match[] = {
	}, {
		.compatible = "nvidia,tegra234-gpio-aon",
		.data = &tegra234_aon_soc
	}, {
		.compatible = "nvidia,tegra256-gpio",
		.data = &tegra256_main_soc
	}, {
		/* sentinel */
	}