Commit dcbf438d authored by Aric Cyr's avatar Aric Cyr Committed by Alex Deucher
Browse files

drm/amd/display: Unify optimize_required flags and VRR adjustments 



[why]
There is only a single call to dc_post_update_surfaces_to_stream
so there is no need to have two flags to control it. Unifying
this to a single flag allows dc_stream_adjust_vmin_vmax to skip
actual programming when there is no change required.

[how]
Remove wm_optimze_required flag and set only optimize_required in its
place.  Then in dc_stream_adjust_vmin_vmax, check that the stream timing
range matches the requested one and skip programming if they are equal.

Reviewed-by: default avatarAlvin Lee <alvin.lee2@amd.com>
Acked-by: default avatarTom Chung <chiahsuan.chung@amd.com>
Signed-off-by: default avatarAric Cyr <aric.cyr@amd.com>
Tested-by: default avatarDaniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent d46fb006

drivers/gpu/drm/amd/display/dc/core/dc.c

+5 −9
Original line number Diff line number Diff line
@@ -411,9 +411,12 @@ bool dc_stream_adjust_vmin_vmax(struct dc *dc, 
	 * avoid conflicting with firmware updates.

	 */

	if (dc->ctx->dce_version > DCE_VERSION_MAX)

		if (dc->optimized_required || dc->wm_optimized_required)

		if (dc->optimized_required)

			return false;



	if (!memcmp(&stream->adjust, adjust, sizeof(*adjust)))

		return true;



	stream->adjust.v_total_max = adjust->v_total_max;

	stream->adjust.v_total_mid = adjust->v_total_mid;

	stream->adjust.v_total_mid_frame_num = adjust->v_total_mid_frame_num;
@@ -2227,7 +2230,6 @@ void dc_post_update_surfaces_to_stream(struct dc *dc) 
	}



	dc->optimized_required = false;

	dc->wm_optimized_required = false;

}



bool dc_set_generic_gpio_for_stereo(bool enable,
@@ -2650,8 +2652,6 @@ enum surface_update_type dc_check_update_surfaces_for_stream( 
		} else if (memcmp(&dc->current_state->bw_ctx.bw.dcn.clk, &dc->clk_mgr->clks, offsetof(struct dc_clocks, prev_p_state_change_support)) != 0) {

			dc->optimized_required = true;

		}



		dc->optimized_required |= dc->wm_optimized_required;

	}



	return type;
@@ -2859,9 +2859,6 @@ static void copy_stream_update_to_stream(struct dc *dc, 
	if (update->vrr_active_fixed)

		stream->vrr_active_fixed = *update->vrr_active_fixed;



	if (update->crtc_timing_adjust)

		stream->adjust = *update->crtc_timing_adjust;



	if (update->dpms_off)

		stream->dpms_off = *update->dpms_off;
@@ -4291,8 +4288,7 @@ static bool full_update_required(struct dc *dc, 
			stream_update->mst_bw_update ||

			stream_update->func_shaper ||

			stream_update->lut3d_func ||

			stream_update->pending_test_pattern ||

			stream_update->crtc_timing_adjust))

			stream_update->pending_test_pattern))

		return true;



	if (stream) {

drivers/gpu/drm/amd/display/dc/dc.h

+0 −1
Original line number Diff line number Diff line
@@ -1038,7 +1038,6 @@ struct dc { 


	/* Require to optimize clocks and bandwidth for added/removed planes */

	bool optimized_required;

	bool wm_optimized_required;

	bool idle_optimizations_allowed;

	bool enable_c20_dtm_b0;

drivers/gpu/drm/amd/display/dc/dc_stream.h

+0 −2
Original line number Diff line number Diff line
@@ -139,7 +139,6 @@ union stream_update_flags { 
		uint32_t wb_update:1;

		uint32_t dsc_changed : 1;

		uint32_t mst_bw : 1;

		uint32_t crtc_timing_adjust : 1;

		uint32_t fams_changed : 1;

	} bits;
@@ -326,7 +325,6 @@ struct dc_stream_update { 
	struct dc_3dlut *lut3d_func;



	struct test_pattern *pending_test_pattern;

	struct dc_crtc_timing_adjust *crtc_timing_adjust;

};



bool dc_is_stream_unchanged(

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

+1 −1
Original line number Diff line number Diff line
@@ -3129,7 +3129,7 @@ void dcn10_prepare_bandwidth( 
			context,

			false);



	dc->wm_optimized_required = hubbub->funcs->program_watermarks(hubbub,

	dc->optimized_required |= hubbub->funcs->program_watermarks(hubbub,

			&context->bw_ctx.bw.dcn.watermarks,

			dc->res_pool->ref_clocks.dchub_ref_clock_inKhz / 1000,

			true);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

+4 −4
Original line number Diff line number Diff line
@@ -2265,10 +2265,10 @@ void dcn20_prepare_bandwidth( 
	}



	/* program dchubbub watermarks:

	 * For assigning wm_optimized_required, use |= operator since we don't want

	 * For assigning optimized_required, use |= operator since we don't want

	 * to clear the value if the optimize has not happened yet

	 */

	dc->wm_optimized_required |= hubbub->funcs->program_watermarks(hubbub,

	dc->optimized_required |= hubbub->funcs->program_watermarks(hubbub,

					&context->bw_ctx.bw.dcn.watermarks,

					dc->res_pool->ref_clocks.dchub_ref_clock_inKhz / 1000,

					false);
@@ -2281,10 +2281,10 @@ void dcn20_prepare_bandwidth( 
	if (hubbub->funcs->program_compbuf_size) {

		if (context->bw_ctx.dml.ip.min_comp_buffer_size_kbytes) {

			compbuf_size_kb = context->bw_ctx.dml.ip.min_comp_buffer_size_kbytes;

			dc->wm_optimized_required |= (compbuf_size_kb != dc->current_state->bw_ctx.dml.ip.min_comp_buffer_size_kbytes);

			dc->optimized_required |= (compbuf_size_kb != dc->current_state->bw_ctx.dml.ip.min_comp_buffer_size_kbytes);

		} else {

			compbuf_size_kb = context->bw_ctx.bw.dcn.compbuf_size_kb;

			dc->wm_optimized_required |= (compbuf_size_kb != dc->current_state->bw_ctx.bw.dcn.compbuf_size_kb);

			dc->optimized_required |= (compbuf_size_kb != dc->current_state->bw_ctx.bw.dcn.compbuf_size_kb);

		}



		hubbub->funcs->program_compbuf_size(hubbub, compbuf_size_kb, false);