Unverified Commit de65fe91 authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'mvebu-dt64-7.1-1' of... 

Merge tag 'mvebu-dt64-7.1-1' of https://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu into soc/late2

mvebu dt64 for 7.1 (part 1)

- Armada 37xx/3720 device tree fixes:
   - Reorder USB PHYs, standardize names, drop undocumented
     properties, fix schema alignment

- Add Marvell 7k COMe board bindings and uDPU ethernet aliases

- Cleanup: drop unused .dtsi files

* tag 'mvebu-dt64-7.1-1' of https://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu

:
  arm64: dts: marvell: armada-37xx: swap PHYs' order in USB3 controller node
  arm64: dts: marvell: armada-37xx: use 'usb2-phy' in USB3 controller's phy-names
  arm64: dts: marvell: armada-37xx: drop 'marvell,usb-misc-reg' from USB host nodes
  arm64: dts: marvell: armada-37xx: drop redundant status property
  arm64: dts: marvell: armada-37xx: align 'phy-names' of EHCI node with DT schema
  dt-bindings: arm64: add Marvell 7k COMe boards
  arm64: dts: marvell: armada-3720: drop 'marvell,xenon-emmc' properties
  arm64: dts: marvell: uDPU: add ethernet aliases
  arm/arm64: dts: marvell: Drop unused .dtsi
  arm64: dts: a7k: use phy handle

Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents 7b82df33 00e6d608

arch/arm/boot/dts/marvell/armada-380.dtsi

deleted100644 → 0
+0 −148
Original line number Diff line number Diff line 
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)

/*

 * Device Tree Include file for Marvell Armada 380 SoC.

 *

 * Copyright (C) 2014 Marvell

 *

 * Lior Amsalem <alior@marvell.com>

 * Gregory CLEMENT <gregory.clement@free-electrons.com>

 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>

 */



#include "armada-38x.dtsi"



/ {

	model = "Marvell Armada 380 family SoC";

	compatible = "marvell,armada380";



	cpus {

		#address-cells = <1>;

		#size-cells = <0>;

		enable-method = "marvell,armada-380-smp";



		cpu@0 {

			device_type = "cpu";

			compatible = "arm,cortex-a9";

			reg = <0>;

		};

	};



	soc {

		internal-regs {

			pinctrl@18000 {

				compatible = "marvell,mv88f6810-pinctrl";

			};

		};



		pcie {

			compatible = "marvell,armada-370-pcie";

			status = "disabled";

			device_type = "pci";



			#address-cells = <3>;

			#size-cells = <2>;



			msi-parent = <&mpic>;

			bus-range = <0x00 0xff>;



			ranges =

			       <0x82000000 0 0x80000 MBUS_ID(0xf0, 0x01) 0x80000 0 0x00002000

				0x82000000 0 0x40000 MBUS_ID(0xf0, 0x01) 0x40000 0 0x00002000

				0x82000000 0 0x44000 MBUS_ID(0xf0, 0x01) 0x44000 0 0x00002000

				0x82000000 0 0x48000 MBUS_ID(0xf0, 0x01) 0x48000 0 0x00002000

				0x82000000 0x1 0     MBUS_ID(0x08, 0xe8) 0 1 0 /* Port 0 MEM */

				0x81000000 0x1 0     MBUS_ID(0x08, 0xe0) 0 1 0 /* Port 0 IO  */

				0x82000000 0x2 0     MBUS_ID(0x04, 0xe8) 0 1 0 /* Port 1 MEM */

				0x81000000 0x2 0     MBUS_ID(0x04, 0xe0) 0 1 0 /* Port 1 IO  */

				0x82000000 0x3 0     MBUS_ID(0x04, 0xd8) 0 1 0 /* Port 2 MEM */

				0x81000000 0x3 0     MBUS_ID(0x04, 0xd0) 0 1 0 /* Port 2 IO  */>;



			/* x1 port */

			pcie@1,0 {

				device_type = "pci";

				assigned-addresses = <0x82000800 0 0x80000 0 0x2000>;

				reg = <0x0800 0 0 0 0>;

				#address-cells = <3>;

				#size-cells = <2>;

				interrupt-names = "intx";

				interrupts-extended = <&gic GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;

				#interrupt-cells = <1>;

				ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0

					  0x81000000 0 0 0x81000000 0x1 0 1 0>;

				bus-range = <0x00 0xff>;

				interrupt-map-mask = <0 0 0 7>;

				interrupt-map = <0 0 0 1 &pcie1_intc 0>,

						<0 0 0 2 &pcie1_intc 1>,

						<0 0 0 3 &pcie1_intc 2>,

						<0 0 0 4 &pcie1_intc 3>;

				marvell,pcie-port = <0>;

				marvell,pcie-lane = <0>;

				clocks = <&gateclk 8>;

				status = "disabled";



				pcie1_intc: interrupt-controller {

					interrupt-controller;

					#interrupt-cells = <1>;

				};

			};



			/* x1 port */

			pcie@2,0 {

				device_type = "pci";

				assigned-addresses = <0x82001000 0 0x40000 0 0x2000>;

				reg = <0x1000 0 0 0 0>;

				#address-cells = <3>;

				#size-cells = <2>;

				interrupt-names = "intx";

				interrupts-extended = <&gic GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;

				#interrupt-cells = <1>;

				ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0

					  0x81000000 0 0 0x81000000 0x2 0 1 0>;

				bus-range = <0x00 0xff>;

				interrupt-map-mask = <0 0 0 7>;

				interrupt-map = <0 0 0 1 &pcie2_intc 0>,

						<0 0 0 2 &pcie2_intc 1>,

						<0 0 0 3 &pcie2_intc 2>,

						<0 0 0 4 &pcie2_intc 3>;

				marvell,pcie-port = <1>;

				marvell,pcie-lane = <0>;

				clocks = <&gateclk 5>;

				status = "disabled";



				pcie2_intc: interrupt-controller {

					interrupt-controller;

					#interrupt-cells = <1>;

				};

			};



			/* x1 port */

			pcie@3,0 {

				device_type = "pci";

				assigned-addresses = <0x82001800 0 0x44000 0 0x2000>;

				reg = <0x1800 0 0 0 0>;

				#address-cells = <3>;

				#size-cells = <2>;

				interrupt-names = "intx";

				interrupts-extended = <&gic GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;

				#interrupt-cells = <1>;

				ranges = <0x82000000 0 0 0x82000000 0x3 0 1 0

					  0x81000000 0 0 0x81000000 0x3 0 1 0>;

				bus-range = <0x00 0xff>;

				interrupt-map-mask = <0 0 0 7>;

				interrupt-map = <0 0 0 1 &pcie3_intc 0>,

						<0 0 0 2 &pcie3_intc 1>,

						<0 0 0 3 &pcie3_intc 2>,

						<0 0 0 4 &pcie3_intc 3>;

				marvell,pcie-port = <2>;

				marvell,pcie-lane = <0>;

				clocks = <&gateclk 6>;

				status = "disabled";



				pcie3_intc: interrupt-controller {

					interrupt-controller;

					#interrupt-cells = <1>;

				};

			};

		};

	};

};

arch/arm64/boot/dts/marvell/armada-3720-atlas-v5.dts

+0 −1
Original line number Diff line number Diff line
@@ -82,7 +82,6 @@ &sdhci0 { 
	mmc-ddr-1_8v;

	mmc-hs400-1_8v;

	sd-uhs-sdr104;

	marvell,xenon-emmc;

	marvell,xenon-tun-count = <9>;

	marvell,pad-type = "fixed-1-8v";

	vqmmc-supply = <&vsdc_reg>;

arch/arm64/boot/dts/marvell/armada-3720-espressobin.dtsi

+0 −1
Original line number Diff line number Diff line
@@ -78,7 +78,6 @@ &sdhci0 { 
	bus-width = <8>;

	mmc-ddr-1_8v;

	mmc-hs400-1_8v;

	marvell,xenon-emmc;

	marvell,xenon-tun-count = <9>;

	marvell,pad-type = "fixed-1-8v";

arch/arm64/boot/dts/marvell/armada-3720-uDPU.dtsi

+6 −1
Original line number Diff line number Diff line
@@ -15,6 +15,11 @@ 
#include "armada-372x.dtsi"



/ {

	aliases {

		ethernet0 = &eth0;

		ethernet1 = &eth1;

	};



	chosen {

		stdout-path = "serial0:115200n8";

	};
@@ -156,7 +161,7 @@ &eth1 { 
&usb3 {

	status = "okay";

	phys = <&usb2_utmi_otg_phy>;

	phy-names = "usb2-utmi-otg-phy";

	phy-names = "usb2-phy";

};



&uart0 {

arch/arm64/boot/dts/marvell/armada-37xx.dtsi

+3 −6
Original line number Diff line number Diff line
@@ -369,11 +369,10 @@ usb3: usb@58000 { 
				compatible = "marvell,armada3700-xhci",

				"generic-xhci";

				reg = <0x58000 0x4000>;

				marvell,usb-misc-reg = <&usb32_syscon>;

				interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;

				clocks = <&sb_periph_clk 12>;

				phys = <&comphy0 0>, <&usb2_utmi_otg_phy>;

				phy-names = "usb3-phy", "usb2-utmi-otg-phy";

				phys = <&usb2_utmi_otg_phy>, <&comphy0 0>;

				phy-names = "usb2-phy", "usb3-phy";

				status = "disabled";

			};
@@ -393,10 +392,9 @@ usb32_syscon: system-controller@5d800 { 
			usb2: usb@5e000 {

				compatible = "marvell,armada-3700-ehci";

				reg = <0x5e000 0x1000>;

				marvell,usb-misc-reg = <&usb2_syscon>;

				interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;

				phys = <&usb2_utmi_host_phy>;

				phy-names = "usb2-utmi-host-phy";

				phy-names = "usb";

				status = "disabled";

			};
@@ -534,7 +532,6 @@ firmware { 
		armada-3700-rwtm {

			compatible = "marvell,armada-3700-rwtm-firmware";

			mboxes = <&rwtm 0>;

			status = "okay";

		};

	};

};