Commit df0279e2 authored by Tim Huang's avatar Tim Huang Committed by Alex Deucher
Browse files

drm/amd/pm: print pp_dpm_mclk in ascending order on SMU v14.0.0 



Currently, the pp_dpm_mclk values are reported in descending order
on SMU IP v14.0.0/1/4. Adjust to ascending order for consistency
with other clock interfaces.

Signed-off-by: default avatarTim Huang <tim.huang@amd.com>
Reviewed-by: default avatarYifan Zhang <yifan1.zhang@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
(cherry picked from commit d4be16cc)
Cc: stable@vger.kernel.org
parent d641a151

drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_0_ppt.c

+3 −2
Original line number Diff line number Diff line
@@ -1132,7 +1132,7 @@ static int smu_v14_0_common_get_dpm_level_count(struct smu_context *smu, 
static int smu_v14_0_0_print_clk_levels(struct smu_context *smu,

					enum smu_clk_type clk_type, char *buf)

{

	int i, size = 0, ret = 0;

	int i, idx, ret = 0, size = 0;

	uint32_t cur_value = 0, value = 0, count = 0;

	uint32_t min, max;
@@ -1168,7 +1168,8 @@ static int smu_v14_0_0_print_clk_levels(struct smu_context *smu, 
			break;



		for (i = 0; i < count; i++) {

			ret = smu_v14_0_common_get_dpm_freq_by_index(smu, clk_type, i, &value);

			idx = (clk_type == SMU_MCLK) ? (count - i - 1) : i;

			ret = smu_v14_0_common_get_dpm_freq_by_index(smu, clk_type, idx, &value);

			if (ret)

				break;