Commit dfa57ecf authored by Vinay Belgaumkar's avatar Vinay Belgaumkar Committed by John Harrison
Browse files

drm/i915/guc: Apply Wa_16011777198 



Enable GuC Wa to reset RCS/CCS before it goes into RC6.

Signed-off-by: default avatarVinay Belgaumkar <vinay.belgaumkar@intel.com>
Reviewed-by: default avatarJohn Harrison <John.C.Harrison@Intel.com>
Signed-off-by: default avatarJohn Harrison <John.C.Harrison@Intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220415224025.3693037-5-umesh.nerlige.ramappa@intel.com
parent c6b41c4d

drivers/gpu/drm/i915/gt/uc/intel_guc.c

+5 −0
Original line number Diff line number Diff line
@@ -310,6 +310,11 @@ static u32 guc_ctl_wa_flags(struct intel_guc *guc) 
	if (GRAPHICS_VER(gt->i915) == 12)

		flags |= GUC_WA_PRE_PARSER;



	/* Wa_16011777198:dg2 */

	if (IS_DG2_GRAPHICS_STEP(gt->i915, G10, STEP_A0, STEP_C0) ||

	    IS_DG2_GRAPHICS_STEP(gt->i915, G11, STEP_A0, STEP_B0))

		flags |= GUC_WA_RCS_RESET_BEFORE_RC6;



	return flags;

}

drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h

+1 −0
Original line number Diff line number Diff line
@@ -100,6 +100,7 @@ 
#define GUC_CTL_WA			1

#define   GUC_WA_GAM_CREDITS		BIT(10)

#define   GUC_WA_DUAL_QUEUE		BIT(11)

#define   GUC_WA_RCS_RESET_BEFORE_RC6	BIT(13)

#define   GUC_WA_PRE_PARSER		BIT(14)

#define   GUC_WA_POLLCS			BIT(18)