Commit e0b91381 authored by Sergio Paracuellos's avatar Sergio Paracuellos Committed by Greg Kroah-Hartman
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staging: mt7621-pci: properly adjust base address for the IO window 



The value to adjust in the bridge register RALINK_PCI_IOBASE must take into
account the raw value from DT, not only the translated linux port number.
As long as io_offset is zero, the two are the same, but if you were to use
multiple host bridge in the system, or pick a different bus address in DT,
you can have a nonzero io_offset. At this means to take into account the
bus address which is used to calculate this offset, substracting it from
the IO resource start address.

Acked-by: default avatarArnd Bergmann <arnd@arndb.de>
Signed-off-by: default avatarSergio Paracuellos <sergio.paracuellos@gmail.com>
Link: https://lore.kernel.org/r/20210925203224.10419-7-sergio.paracuellos@gmail.com


Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 9f76779f

drivers/staging/mt7621-pci/pci-mt7621.c

+1 −1
Original line number Diff line number Diff line
@@ -482,7 +482,7 @@ static int mt7621_pcie_enable_ports(struct pci_host_bridge *host) 


	/* Setup MEMWIN and IOWIN */

	pcie_write(pcie, 0xffffffff, RALINK_PCI_MEMBASE);

	pcie_write(pcie, entry->res->start, RALINK_PCI_IOBASE);

	pcie_write(pcie, entry->res->start - entry->offset, RALINK_PCI_IOBASE);



	list_for_each_entry(port, &pcie->ports, list) {

		if (port->enabled) {