Commit e0daef7d authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'drm-fixes-2025-01-11' of https://gitlab.freedesktop.org/drm/kernel 

Pull drm fixes from Dave Airlie:
 "Regular weekly fixes, this has the usual amdgpu/xe/i915 bits.

  There is a bigger bunch of mediatek patches that I considered not
  including at this stage, but all the changes (except for one were
  obvious small fixes, and the rotation one is a few lines, and I
  suppose will help someone have their screen up the right way), I
  decided to include it since I expect it got slowed down by holidays
  etc, and it's not that mainstream a hw platform.

  i915:
   - Revert "drm/i915/hdcp: Don't enable HDCP1.4 directly from
     check_link"

  amdgpu:
   - Display interrupt fixes
   - Fix display max surface mismatches
   - Fix divide error in DM plane scale calcs
   - Display divide by 0 checks in dml helpers
   - SMU 13 AD/DC interrrupt handling fix
   - Fix locking around buddy trim handling

  amdkfd:
   - Fix page fault with shader debugger enabled
   - Fix eviction fence wq handling

  xe:
   - Avoid a NULL ptr deref when wedging
   - Fix power gate sequence on DG1

  mediatek:
   - Revert "drm/mediatek: dsi: Correct calculation formula of PHY
     Timing"
   - Set private->all_drm_private[i]->drm to NULL if mtk_drm_bind
     returns err
   - Move mtk_crtc_finish_page_flip() to ddp_cmdq_cb()
   - Only touch DISP_REG_OVL_PITCH_MSB if AFBC is supported
   - Add support for 180-degree rotation in the display driver
   - Stop selecting foreign drivers
   - Revert "drm/mediatek: Switch to for_each_child_of_node_scoped()"
   - Fix YCbCr422 color format issue for DP
   - Fix mode valid issue for dp
   - dp: Reference common DAI properties
   - dsi: Add registers to pdata to fix MT8186/MT8188
   - Remove unneeded semicolon
   - Add return value check when reading DPCD
   - Initialize pointer in mtk_drm_of_ddp_path_build_one()"

* tag 'drm-fixes-2025-01-11' of https://gitlab.freedesktop.org/drm/kernel: (26 commits)
  drm/xe/dg1: Fix power gate sequence.
  drm/xe: Fix tlb invalidation when wedging
  Revert "drm/i915/hdcp: Don't enable HDCP1.4 directly from check_link"
  drm/amdgpu: Add a lock when accessing the buddy trim function
  drm/amd/pm:  fix BUG: scheduling while atomic
  drm/amdkfd: wq_release signals dma_fence only when available
  drm/amd/display: Add check for granularity in dml ceil/floor helpers
  drm/amdkfd: fixed page fault when enable MES shader debugger
  drm/amd/display: fix divide error in DM plane scale calcs
  drm/amd/display: increase MAX_SURFACES to the value supported by hw
  drm/amd/display: fix page fault due to max surface definition mismatch
  drm/amd/display: Remove unnecessary amdgpu_irq_get/put
  drm/mediatek: Initialize pointer in mtk_drm_of_ddp_path_build_one()
  drm/mediatek: Add return value check when reading DPCD
  drm/mediatek: Remove unneeded semicolon
  drm/mediatek: mtk_dsi: Add registers to pdata to fix MT8186/MT8188
  dt-bindings: display: mediatek: dp: Reference common DAI properties
  drm/mediatek: Fix mode valid issue for dp
  drm/mediatek: Fix YCbCr422 color format issue for DP
  Revert "drm/mediatek: Switch to for_each_child_of_node_scoped()"
  ...
parents f8c62633 fddb4fd9

Documentation/devicetree/bindings/display/mediatek/mediatek,dp.yaml

+18 −1
Original line number Diff line number Diff line
@@ -42,6 +42,9 @@ properties: 
  interrupts:

    maxItems: 1



  '#sound-dai-cells':

    const: 0



  ports:

    $ref: /schemas/graph.yaml#/properties/ports

    properties:
@@ -85,7 +88,21 @@ required: 
  - ports

  - max-linkrate-mhz



additionalProperties: false

allOf:

  - $ref: /schemas/sound/dai-common.yaml#

  - if:

      not:

        properties:

          compatible:

            contains:

              enum:

                - mediatek,mt8188-dp-tx

                - mediatek,mt8195-dp-tx

    then:

      properties:

        '#sound-dai-cells': false



unevaluatedProperties: false



examples:

  - |

drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c

+1 −1
Original line number Diff line number Diff line
@@ -567,7 +567,6 @@ static int amdgpu_vram_mgr_new(struct ttm_resource_manager *man, 
		else

			remaining_size -= size;

	}

	mutex_unlock(&mgr->lock);



	if (bo->flags & AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS && adjust_dcc_size) {

		struct drm_buddy_block *dcc_block;
@@ -584,6 +583,7 @@ static int amdgpu_vram_mgr_new(struct ttm_resource_manager *man, 
				     (u64)vres->base.size,

				     &vres->blocks);

	}

	mutex_unlock(&mgr->lock);



	vres->base.start = 0;

	size = max_t(u64, amdgpu_vram_mgr_blocks_size(&vres->blocks),

drivers/gpu/drm/amd/amdkfd/kfd_debug.c

+17 −0
Original line number Diff line number Diff line
@@ -350,10 +350,27 @@ int kfd_dbg_set_mes_debug_mode(struct kfd_process_device *pdd, bool sq_trap_en) 
{

	uint32_t spi_dbg_cntl = pdd->spi_dbg_override | pdd->spi_dbg_launch_mode;

	uint32_t flags = pdd->process->dbg_flags;

	struct amdgpu_device *adev = pdd->dev->adev;

	int r;



	if (!kfd_dbg_is_per_vmid_supported(pdd->dev))

		return 0;



	if (!pdd->proc_ctx_cpu_ptr) {

			r = amdgpu_amdkfd_alloc_gtt_mem(adev,

				AMDGPU_MES_PROC_CTX_SIZE,

				&pdd->proc_ctx_bo,

				&pdd->proc_ctx_gpu_addr,

				&pdd->proc_ctx_cpu_ptr,

				false);

		if (r) {

			dev_err(adev->dev,

			"failed to allocate process context bo\n");

			return r;

		}

		memset(pdd->proc_ctx_cpu_ptr, 0, AMDGPU_MES_PROC_CTX_SIZE);

	}



	return amdgpu_mes_set_shader_debugger(pdd->dev->adev, pdd->proc_ctx_gpu_addr, spi_dbg_cntl,

						pdd->watch_points, flags, sq_trap_en);

}

drivers/gpu/drm/amd/amdkfd/kfd_process.c

+2 −1
Original line number Diff line number Diff line
@@ -1160,6 +1160,7 @@ static void kfd_process_wq_release(struct work_struct *work) 
	 */

	synchronize_rcu();

	ef = rcu_access_pointer(p->ef);

	if (ef)

		dma_fence_signal(ef);



	kfd_process_remove_sysfs(p);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

+2 −33
Original line number Diff line number Diff line
@@ -8400,16 +8400,6 @@ static void manage_dm_interrupts(struct amdgpu_device *adev, 
				 struct amdgpu_crtc *acrtc,

				 struct dm_crtc_state *acrtc_state)

{

	/*

	 * We have no guarantee that the frontend index maps to the same

	 * backend index - some even map to more than one.

	 *

	 * TODO: Use a different interrupt or check DC itself for the mapping.

	 */

	int irq_type =

		amdgpu_display_crtc_idx_to_irq_type(

			adev,

			acrtc->crtc_id);

	struct drm_vblank_crtc_config config = {0};

	struct dc_crtc_timing *timing;

	int offdelay;
@@ -8435,28 +8425,7 @@ static void manage_dm_interrupts(struct amdgpu_device *adev, 


		drm_crtc_vblank_on_config(&acrtc->base,

					  &config);



		amdgpu_irq_get(

			adev,

			&adev->pageflip_irq,

			irq_type);

#if defined(CONFIG_DRM_AMD_SECURE_DISPLAY)

		amdgpu_irq_get(

			adev,

			&adev->vline0_irq,

			irq_type);

#endif

	} else {

#if defined(CONFIG_DRM_AMD_SECURE_DISPLAY)

		amdgpu_irq_put(

			adev,

			&adev->vline0_irq,

			irq_type);

#endif

		amdgpu_irq_put(

			adev,

			&adev->pageflip_irq,

			irq_type);

		drm_crtc_vblank_off(&acrtc->base);

	}

}
@@ -11155,8 +11124,8 @@ dm_get_plane_scale(struct drm_plane_state *plane_state, 
	int plane_src_w, plane_src_h;



	dm_get_oriented_plane_size(plane_state, &plane_src_w, &plane_src_h);

	*out_plane_scale_w = plane_state->crtc_w * 1000 / plane_src_w;

	*out_plane_scale_h = plane_state->crtc_h * 1000 / plane_src_h;

	*out_plane_scale_w = plane_src_w ? plane_state->crtc_w * 1000 / plane_src_w : 0;

	*out_plane_scale_h = plane_src_h ? plane_state->crtc_h * 1000 / plane_src_h : 0;

}



/*