Commit e0f0a16f authored by Bjorn Helgaas's avatar Bjorn Helgaas
Browse files

PCI: Use FIELD_GET() 

Use FIELD_GET() and FIELD_PREP() to remove dependences on the field
position, i.e., the shift value.  No functional change intended.

Link: https://lore.kernel.org/r/20231010204436.1000644-2-helgaas@kernel.org


Signed-off-by: default avatarBjorn Helgaas <bhelgaas@google.com>
Reviewed-by: default avatarJonathan Cameron <Jonathan.Cameron@huawei.com>
Reviewed-by: default avatarKuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>
parent 682f5311

drivers/pci/pci.c

+22 −23
Original line number Diff line number Diff line
@@ -1775,8 +1775,7 @@ static void pci_restore_rebar_state(struct pci_dev *pdev) 
		return;



	pci_read_config_dword(pdev, pos + PCI_REBAR_CTRL, &ctrl);

	nbars = (ctrl & PCI_REBAR_CTRL_NBAR_MASK) >>

		    PCI_REBAR_CTRL_NBAR_SHIFT;

	nbars = FIELD_GET(PCI_REBAR_CTRL_NBAR_MASK, ctrl);



	for (i = 0; i < nbars; i++, pos += 8) {

		struct resource *res;
@@ -1787,7 +1786,7 @@ static void pci_restore_rebar_state(struct pci_dev *pdev) 
		res = pdev->resource + bar_idx;

		size = pci_rebar_bytes_to_size(resource_size(res));

		ctrl &= ~PCI_REBAR_CTRL_BAR_SIZE;

		ctrl |= size << PCI_REBAR_CTRL_BAR_SHIFT;

		ctrl |= FIELD_PREP(PCI_REBAR_CTRL_BAR_SIZE, size);

		pci_write_config_dword(pdev, pos + PCI_REBAR_CTRL, ctrl);

	}

}
@@ -3228,7 +3227,7 @@ void pci_pm_init(struct pci_dev *dev) 
			 (pmc & PCI_PM_CAP_PME_D2) ? " D2" : "",

			 (pmc & PCI_PM_CAP_PME_D3hot) ? " D3hot" : "",

			 (pmc & PCI_PM_CAP_PME_D3cold) ? " D3cold" : "");

		dev->pme_support = pmc >> PCI_PM_CAP_PME_SHIFT;

		dev->pme_support = FIELD_GET(PCI_PM_CAP_PME_MASK, pmc);

		dev->pme_poll = true;

		/*

		 * Make device's PM flags reflect the wake-up capability, but
@@ -3299,20 +3298,20 @@ static int pci_ea_read(struct pci_dev *dev, int offset) 
	ent_offset += 4;



	/* Entry size field indicates DWORDs after 1st */

	ent_size = ((dw0 & PCI_EA_ES) + 1) << 2;

	ent_size = (FIELD_GET(PCI_EA_ES, dw0) + 1) << 2;



	if (!(dw0 & PCI_EA_ENABLE)) /* Entry not enabled */

		goto out;



	bei = (dw0 & PCI_EA_BEI) >> 4;

	prop = (dw0 & PCI_EA_PP) >> 8;

	bei = FIELD_GET(PCI_EA_BEI, dw0);

	prop = FIELD_GET(PCI_EA_PP, dw0);



	/*

	 * If the Property is in the reserved range, try the Secondary

	 * Property instead.

	 */

	if (prop > PCI_EA_P_BRIDGE_IO && prop < PCI_EA_P_MEM_RESERVED)

		prop = (dw0 & PCI_EA_SP) >> 16;

		prop = FIELD_GET(PCI_EA_SP, dw0);

	if (prop > PCI_EA_P_BRIDGE_IO)

		goto out;
@@ -3719,14 +3718,13 @@ static int pci_rebar_find_pos(struct pci_dev *pdev, int bar) 
		return -ENOTSUPP;



	pci_read_config_dword(pdev, pos + PCI_REBAR_CTRL, &ctrl);

	nbars = (ctrl & PCI_REBAR_CTRL_NBAR_MASK) >>

		    PCI_REBAR_CTRL_NBAR_SHIFT;

	nbars = FIELD_GET(PCI_REBAR_CTRL_NBAR_MASK, ctrl);



	for (i = 0; i < nbars; i++, pos += 8) {

		int bar_idx;



		pci_read_config_dword(pdev, pos + PCI_REBAR_CTRL, &ctrl);

		bar_idx = ctrl & PCI_REBAR_CTRL_BAR_IDX;

		bar_idx = FIELD_GET(PCI_REBAR_CTRL_BAR_IDX, ctrl);

		if (bar_idx == bar)

			return pos;

	}
@@ -3781,7 +3779,7 @@ int pci_rebar_get_current_size(struct pci_dev *pdev, int bar) 
		return pos;



	pci_read_config_dword(pdev, pos + PCI_REBAR_CTRL, &ctrl);

	return (ctrl & PCI_REBAR_CTRL_BAR_SIZE) >> PCI_REBAR_CTRL_BAR_SHIFT;

	return FIELD_GET(PCI_REBAR_CTRL_BAR_SIZE, ctrl);

}



/**
@@ -3804,7 +3802,7 @@ int pci_rebar_set_size(struct pci_dev *pdev, int bar, int size) 


	pci_read_config_dword(pdev, pos + PCI_REBAR_CTRL, &ctrl);

	ctrl &= ~PCI_REBAR_CTRL_BAR_SIZE;

	ctrl |= size << PCI_REBAR_CTRL_BAR_SHIFT;

	ctrl |= FIELD_PREP(PCI_REBAR_CTRL_BAR_SIZE, size);

	pci_write_config_dword(pdev, pos + PCI_REBAR_CTRL, ctrl);

	return 0;

}
@@ -6042,7 +6040,7 @@ int pcix_get_max_mmrbc(struct pci_dev *dev) 
	if (pci_read_config_dword(dev, cap + PCI_X_STATUS, &stat))

		return -EINVAL;



	return 512 << ((stat & PCI_X_STATUS_MAX_READ) >> 21);

	return 512 << FIELD_GET(PCI_X_STATUS_MAX_READ, stat);

}

EXPORT_SYMBOL(pcix_get_max_mmrbc);
@@ -6065,7 +6063,7 @@ int pcix_get_mmrbc(struct pci_dev *dev) 
	if (pci_read_config_word(dev, cap + PCI_X_CMD, &cmd))

		return -EINVAL;



	return 512 << ((cmd & PCI_X_CMD_MAX_READ) >> 2);

	return 512 << FIELD_GET(PCI_X_CMD_MAX_READ, cmd);

}

EXPORT_SYMBOL(pcix_get_mmrbc);
@@ -6096,19 +6094,19 @@ int pcix_set_mmrbc(struct pci_dev *dev, int mmrbc) 
	if (pci_read_config_dword(dev, cap + PCI_X_STATUS, &stat))

		return -EINVAL;



	if (v > (stat & PCI_X_STATUS_MAX_READ) >> 21)

	if (v > FIELD_GET(PCI_X_STATUS_MAX_READ, stat))

		return -E2BIG;



	if (pci_read_config_word(dev, cap + PCI_X_CMD, &cmd))

		return -EINVAL;



	o = (cmd & PCI_X_CMD_MAX_READ) >> 2;

	o = FIELD_GET(PCI_X_CMD_MAX_READ, cmd);

	if (o != v) {

		if (v > o && (dev->bus->bus_flags & PCI_BUS_FLAGS_NO_MMRBC))

			return -EIO;



		cmd &= ~PCI_X_CMD_MAX_READ;

		cmd |= v << 2;

		cmd |= FIELD_PREP(PCI_X_CMD_MAX_READ, v);

		if (pci_write_config_word(dev, cap + PCI_X_CMD, cmd))

			return -EIO;

	}
@@ -6128,7 +6126,7 @@ int pcie_get_readrq(struct pci_dev *dev) 


	pcie_capability_read_word(dev, PCI_EXP_DEVCTL, &ctl);



	return 128 << ((ctl & PCI_EXP_DEVCTL_READRQ) >> 12);

	return 128 << FIELD_GET(PCI_EXP_DEVCTL_READRQ, ctl);

}

EXPORT_SYMBOL(pcie_get_readrq);
@@ -6161,7 +6159,7 @@ int pcie_set_readrq(struct pci_dev *dev, int rq) 
			rq = mps;

	}



	v = (ffs(rq) - 8) << 12;

	v = FIELD_PREP(PCI_EXP_DEVCTL_READRQ, ffs(rq) - 8);



	if (bridge->no_inc_mrrs) {

		int max_mrrs = pcie_get_readrq(dev);
@@ -6191,7 +6189,7 @@ int pcie_get_mps(struct pci_dev *dev) 


	pcie_capability_read_word(dev, PCI_EXP_DEVCTL, &ctl);



	return 128 << ((ctl & PCI_EXP_DEVCTL_PAYLOAD) >> 5);

	return 128 << FIELD_GET(PCI_EXP_DEVCTL_PAYLOAD, ctl);

}

EXPORT_SYMBOL(pcie_get_mps);
@@ -6214,7 +6212,7 @@ int pcie_set_mps(struct pci_dev *dev, int mps) 
	v = ffs(mps) - 8;

	if (v > dev->pcie_mpss)

		return -EINVAL;

	v <<= 5;

	v = FIELD_PREP(PCI_EXP_DEVCTL_PAYLOAD, v);



	ret = pcie_capability_clear_and_set_word(dev, PCI_EXP_DEVCTL,

						  PCI_EXP_DEVCTL_PAYLOAD, v);
@@ -6256,7 +6254,8 @@ u32 pcie_bandwidth_available(struct pci_dev *dev, struct pci_dev **limiting_dev, 
	while (dev) {

		pcie_capability_read_word(dev, PCI_EXP_LNKSTA, &lnksta);



		next_speed = pcie_link_speed[lnksta & PCI_EXP_LNKSTA_CLS];

		next_speed = pcie_link_speed[FIELD_GET(PCI_EXP_LNKSTA_CLS,

						       lnksta)];

		next_width = FIELD_GET(PCI_EXP_LNKSTA_NLW, lnksta);



		next_bw = next_width * PCIE_SPEED2MBS_ENC(next_speed);

drivers/pci/probe.c

+4 −4
Original line number Diff line number Diff line
@@ -807,8 +807,8 @@ static void pci_set_bus_speed(struct pci_bus *bus) 
		}



		bus->max_bus_speed = max;

		bus->cur_bus_speed = pcix_bus_speed[

			(status & PCI_X_SSTATUS_FREQ) >> 6];

		bus->cur_bus_speed =

			pcix_bus_speed[FIELD_GET(PCI_X_SSTATUS_FREQ, status)];



		return;

	}
@@ -1217,8 +1217,8 @@ static bool pci_ea_fixed_busnrs(struct pci_dev *dev, u8 *sec, u8 *sub) 


	offset = ea + PCI_EA_FIRST_ENT;

	pci_read_config_dword(dev, offset, &dw);

	ea_sec =  dw & PCI_EA_SEC_BUS_MASK;

	ea_sub = (dw & PCI_EA_SUB_BUS_MASK) >> PCI_EA_SUB_BUS_SHIFT;

	ea_sec = FIELD_GET(PCI_EA_SEC_BUS_MASK, dw);

	ea_sub = FIELD_GET(PCI_EA_SUB_BUS_MASK, dw);

	if (ea_sec  == 0 || ea_sub < ea_sec)

		return false;