Commit e34c6356 authored by Suraj Kandpal's avatar Suraj Kandpal
Browse files

drm/i915/display: Aux Enable and Display powerwell timeouts 



From XE3P we can now poll if the AUX power is up or down define the
timeouts for each respectively.

Bspec: 68967
Signed-off-by: default avatarSuraj Kandpal <suraj.kandpal@intel.com>
Reviewed-by: default avatarArun R Murthy <arun.r.murthy@intel.com>
Link: https://patch.msgid.link/20251101032513.4171255-25-suraj.kandpal@intel.com
parent 9dcf1836

drivers/gpu/drm/i915/display/intel_display_power_well.c

+20 −2
Original line number Diff line number Diff line
@@ -1864,19 +1864,37 @@ static void xelpdp_aux_power_well_enable(struct intel_display *display, 
	 * expected to just wait a fixed 600us after raising the request

	 * bit.

	 */

	if (DISPLAY_VER(display) >= 35) {

		if (intel_de_wait_for_set(display, XELPDP_DP_AUX_CH_CTL(display, aux_ch),

					  XELPDP_DP_AUX_CH_CTL_POWER_STATUS, 2))

			drm_warn(display->drm,

				 "Timeout waiting for PHY %c AUX channel power to be up\n",

				 phy_name(phy));

	} else {

		usleep_range(600, 1200);

	}

}



static void xelpdp_aux_power_well_disable(struct intel_display *display,

					  struct i915_power_well *power_well)

{

	enum aux_ch aux_ch = i915_power_well_instance(power_well)->xelpdp.aux_ch;

	enum phy phy = icl_aux_pw_to_phy(display, power_well);



	intel_de_rmw(display, XELPDP_DP_AUX_CH_CTL(display, aux_ch),

		     XELPDP_DP_AUX_CH_CTL_POWER_REQUEST,

		     0);



	if (DISPLAY_VER(display) >= 35) {

		if (intel_de_wait_for_clear(display, XELPDP_DP_AUX_CH_CTL(display, aux_ch),

					    XELPDP_DP_AUX_CH_CTL_POWER_STATUS, 1))

			drm_warn(display->drm,

				 "Timeout waiting for PHY %c AUX channel to powerdown\n",

				 phy_name(phy));

	} else {

		usleep_range(10, 30);

	}

}



static bool xelpdp_aux_power_well_enabled(struct intel_display *display,

					  struct i915_power_well *power_well)