Loading drivers/soc/tegra/fuse/fuse-tegra.c +1 −1 Original line number Diff line number Diff line Loading @@ -336,7 +336,7 @@ static ssize_t platform_show(struct device *dev, struct device_attribute *attr, * platform type is silicon and all other non-zero values indicate * the type of simulation platform is being used. */ return sprintf(buf, "%d\n", (tegra_read_chipid() >> 20) & 0xf); return sprintf(buf, "%d\n", tegra_get_platform()); } static DEVICE_ATTR_RO(platform); Loading drivers/soc/tegra/fuse/tegra-apbmisc.c +24 −0 Original line number Diff line number Diff line Loading @@ -47,6 +47,30 @@ u8 tegra_get_minor_rev(void) return (tegra_read_chipid() >> 16) & 0xf; } u8 tegra_get_platform(void) { return (tegra_read_chipid() >> 20) & 0xf; } bool tegra_is_silicon(void) { switch (tegra_get_chip_id()) { case TEGRA194: if (tegra_get_platform() == 0) return true; return false; } /* * Chips prior to Tegra194 have a different way of determining whether * they are silicon or not. Since we never supported simulation on the * older Tegra chips, don't bother extracting the information and just * report that we're running on silicon. */ return true; } u32 tegra_read_straps(void) { WARN(!chipid, "Tegra ABP MISC not yet available\n"); Loading include/soc/tegra/fuse.h +2 −0 Original line number Diff line number Diff line Loading @@ -23,6 +23,8 @@ u32 tegra_read_chipid(void); u8 tegra_get_chip_id(void); u8 tegra_get_platform(void); bool tegra_is_silicon(void); enum tegra_revision { TEGRA_REVISION_UNKNOWN = 0, Loading Loading
drivers/soc/tegra/fuse/fuse-tegra.c +1 −1 Original line number Diff line number Diff line Loading @@ -336,7 +336,7 @@ static ssize_t platform_show(struct device *dev, struct device_attribute *attr, * platform type is silicon and all other non-zero values indicate * the type of simulation platform is being used. */ return sprintf(buf, "%d\n", (tegra_read_chipid() >> 20) & 0xf); return sprintf(buf, "%d\n", tegra_get_platform()); } static DEVICE_ATTR_RO(platform); Loading
drivers/soc/tegra/fuse/tegra-apbmisc.c +24 −0 Original line number Diff line number Diff line Loading @@ -47,6 +47,30 @@ u8 tegra_get_minor_rev(void) return (tegra_read_chipid() >> 16) & 0xf; } u8 tegra_get_platform(void) { return (tegra_read_chipid() >> 20) & 0xf; } bool tegra_is_silicon(void) { switch (tegra_get_chip_id()) { case TEGRA194: if (tegra_get_platform() == 0) return true; return false; } /* * Chips prior to Tegra194 have a different way of determining whether * they are silicon or not. Since we never supported simulation on the * older Tegra chips, don't bother extracting the information and just * report that we're running on silicon. */ return true; } u32 tegra_read_straps(void) { WARN(!chipid, "Tegra ABP MISC not yet available\n"); Loading
include/soc/tegra/fuse.h +2 −0 Original line number Diff line number Diff line Loading @@ -23,6 +23,8 @@ u32 tegra_read_chipid(void); u8 tegra_get_chip_id(void); u8 tegra_get_platform(void); bool tegra_is_silicon(void); enum tegra_revision { TEGRA_REVISION_UNKNOWN = 0, Loading