Commit e6136150 authored by Yang Wang's avatar Yang Wang Committed by Alex Deucher
Browse files

drm/amdgpu: refine aca error cache for gfx v9.4.3 



refine aca error cache for gfx 9.4.3

Signed-off-by: default avatarYang Wang <kevinyang.wang@amd.com>
Reviewed-by: default avatarHawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 949899cb

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

+8 −5
Original line number Diff line number Diff line
@@ -684,33 +684,36 @@ static int gfx_v9_4_3_aca_bank_generate_report(struct aca_handle *handle, 
					       struct aca_bank *bank, enum aca_smu_type type,

					       struct aca_bank_report *report, void *data)

{

	struct aca_bank_info info;

	u64 misc0;

	u32 instlo;

	int ret;



	ret = aca_bank_info_decode(bank, &report->info);

	ret = aca_bank_info_decode(bank, &info);

	if (ret)

		return ret;



	/* NOTE: overwrite info.die_id with xcd id for gfx */

	instlo = ACA_REG__IPID__INSTANCEIDLO(bank->regs[ACA_REG_IDX_IPID]);

	instlo &= GENMASK(31, 1);

	report->info.die_id = instlo == mmSMNAID_XCD0_MCA_SMU ? 0 : 1;

	info.die_id = instlo == mmSMNAID_XCD0_MCA_SMU ? 0 : 1;



	misc0 = bank->regs[ACA_REG_IDX_MISC0];



	switch (type) {

	case ACA_SMU_TYPE_UE:

		report->count[ACA_ERROR_TYPE_UE] = 1ULL;

		ret = aca_error_cache_log_bank_error(handle, &info,

						     ACA_ERROR_TYPE_UE, 1ULL);

		break;

	case ACA_SMU_TYPE_CE:

		report->count[ACA_ERROR_TYPE_CE] = ACA_REG__MISC0__ERRCNT(misc0);

		ret = aca_error_cache_log_bank_error(handle, &info,

						     ACA_ERROR_TYPE_CE, ACA_REG__MISC0__ERRCNT(misc0));

		break;

	default:

		return -EINVAL;

	}



	return 0;

	return ret;

}



static bool gfx_v9_4_3_aca_bank_is_valid(struct aca_handle *handle, struct aca_bank *bank,