Commit e9ffa12e authored by Biju Das's avatar Biju Das Committed by Marc Kleine-Budde
Browse files

can: rcar_canfd: Add rnc_field_width variable to struct rcar_canfd_hw_info 



The shift and w value in rcar_canfd_setrnc() are dictated by the
field width:
  - R-Car Gen4 packs 2 values in a 32-bit word, using a field width
    of 16 bits,
  - R-Car Gen3 packs up to 4 values in a 32-bit word, using a field
    width of 8 bits.

Add rnc_field_width variable to struct rcar_canfd_hw_info to handle this
difference. The rnc_stride is 32 / rnc_field_width and the index parameter
w is calculated by ch / rnc_stride. The shift value in rcar_canfd_setrnc()
is computed by using (32 - (ch % rnc_stride + 1) * rnc_field_width).

Reviewed-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: default avatarBiju Das <biju.das.jz@bp.renesas.com>
Link: https://patch.msgid.link/20250417054320.14100-10-biju.das.jz@bp.renesas.com


Signed-off-by: default avatarMarc Kleine-Budde <mkl@pengutronix.de>
parent a2427e44

drivers/net/can/rcar/rcar_canfd.c

+7 −2
Original line number Diff line number Diff line
@@ -503,6 +503,7 @@ 
struct rcar_canfd_global;



struct rcar_canfd_hw_info {

	u8 rnc_field_width;

	u8 max_channels;

	u8 postdiv;

	/* hardware features */
@@ -579,18 +580,21 @@ static const struct can_bittiming_const rcar_canfd_bittiming_const = { 
};



static const struct rcar_canfd_hw_info rcar_gen3_hw_info = {

	.rnc_field_width = 8,

	.max_channels = 2,

	.postdiv = 2,

	.shared_global_irqs = 1,

};



static const struct rcar_canfd_hw_info rcar_gen4_hw_info = {

	.rnc_field_width = 16,

	.max_channels = 8,

	.postdiv = 2,

	.shared_global_irqs = 1,

};



static const struct rcar_canfd_hw_info rzg2l_hw_info = {

	.rnc_field_width = 8,

	.max_channels = 2,

	.postdiv = 1,

	.multi_channel_irqs = 1,
@@ -676,9 +680,10 @@ static void rcar_canfd_tx_failure_cleanup(struct net_device *ndev) 
static void rcar_canfd_setrnc(struct rcar_canfd_global *gpriv, unsigned int ch,

			      unsigned int num_rules)

{

	unsigned int shift = reg_gen4(gpriv, 16, 24) - (ch & 1) * reg_gen4(gpriv, 16, 8);

	unsigned int rnc_stride = 32 / gpriv->info->rnc_field_width;

	unsigned int shift = 32 - (ch % rnc_stride + 1) * gpriv->info->rnc_field_width;

	unsigned int w = ch / rnc_stride;

	u32 rnc = num_rules << shift;

	unsigned int w = ch / 2;



	rcar_canfd_set_bit(gpriv->base, RCANFD_GAFLCFG(w), rnc);

}