Commit ea173d15 authored by Xiaojian Du's avatar Xiaojian Du Committed by Alex Deucher
Browse files

drm/amd/pm: add support to umd P-state function for vangogh 



This patch is to add support to umd P-state function for vangogh.
It enables the "set" function of 3 sysfs nodes: pp_dpm_mclk,
pp_dpm_fclk, pp_dpm_socclk, the functions is used to set the DPM
frequency level of memclk/fclk/socclk.
Due to only after enabling the "power_dpm_force_performance_level"
sysfs node, it is allowed to set these three nodes,
so this patch also enables the "powe_dpm_force_performance_level"
sysfs node, which is used to change power profile.

Signed-off-by: default avatarXiaojian Du <Xiaojian.Du@amd.com>
Reviewed-by: default avatarHuang Rui <ray.huang@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent dd9e0b21

drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c

+46 −1
Original line number Diff line number Diff line
@@ -1056,6 +1056,50 @@ static int vangogh_set_peak_clock_by_device(struct smu_context *smu) 
	return ret;

}



static int vangogh_set_performance_level(struct smu_context *smu,

					enum amd_dpm_forced_level level)

{

	int ret = 0;

	uint32_t soc_mask, mclk_mask, fclk_mask;



	switch (level) {

	case AMD_DPM_FORCED_LEVEL_HIGH:

		ret = vangogh_force_dpm_limit_value(smu, true);

		break;

	case AMD_DPM_FORCED_LEVEL_LOW:

		ret = vangogh_force_dpm_limit_value(smu, false);

		break;

	case AMD_DPM_FORCED_LEVEL_AUTO:

		ret = vangogh_unforce_dpm_levels(smu);

		break;

	case AMD_DPM_FORCED_LEVEL_PROFILE_STANDARD:

		break;

	case AMD_DPM_FORCED_LEVEL_PROFILE_MIN_SCLK:

		break;

	case AMD_DPM_FORCED_LEVEL_PROFILE_MIN_MCLK:

		ret = vangogh_get_profiling_clk_mask(smu, level,

							NULL,

							NULL,

							&mclk_mask,

							&fclk_mask,

							&soc_mask);

		if (ret)

			return ret;

		vangogh_force_clk_levels(smu, SMU_MCLK, 1 << mclk_mask);

		vangogh_force_clk_levels(smu, SMU_FCLK, 1 << fclk_mask);

		vangogh_force_clk_levels(smu, SMU_SOCCLK, 1 << soc_mask);

		break;

	case AMD_DPM_FORCED_LEVEL_PROFILE_PEAK:

		ret = vangogh_set_peak_clock_by_device(smu);

		break;

	case AMD_DPM_FORCED_LEVEL_MANUAL:

	case AMD_DPM_FORCED_LEVEL_PROFILE_EXIT:

	default:

		break;

	}

	return ret;

}



static int vangogh_read_sensor(struct smu_context *smu,

				 enum amd_pp_sensors sensor,

				 void *data, uint32_t *size)
@@ -1449,6 +1493,7 @@ static const struct pptable_funcs vangogh_ppt_funcs = { 
	.set_power_profile_mode = vangogh_set_power_profile_mode,

	.get_dpm_clock_table = vangogh_get_dpm_clock_table,

	.force_clk_levels = vangogh_force_clk_levels,

	.set_performance_level = vangogh_set_performance_level,

	.post_init = vangogh_post_smu_init,

};