Commit ea1ba200 authored by Stephen Boyd's avatar Stephen Boyd
Browse files

Merge tag 'sunxi-clk-for-6.13' of... 

Merge tag 'sunxi-clk-for-6.13' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into clk-allwinner

Pull Allwinner clk driver updates from Chen-Yu Tsai:

 - Add sigma-delta modulation settings for audio PLL on the H616 SoC,
   crucial for accurate audio reproduction
 - Constify |struct ccu_reset_map| throughout the sunxi-ng clk drivers
 - Fix the audio PLL divider preset on the D1 SoC
 - Switch to of_property_present() for checking DT property presence

* tag 'sunxi-clk-for-6.13' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
  clk: sunxi-ng: Use of_property_present() for non-boolean properties
  clk: sunxi-ng: d1: Fix PLL_AUDIO0 preset
  clk: sunxi-ng: Constify struct ccu_reset_map
  clk: sunxi-ng: h616: Add sigma-delta modulation settings for audio PLL
parents 9852d85e 1054861b

drivers/clk/sunxi-ng/ccu-sun20i-d1-r.c

+1 −1
Original line number Diff line number Diff line
@@ -91,7 +91,7 @@ static struct clk_hw_onecell_data sun20i_d1_r_hw_clks = { 
	},

};



static struct ccu_reset_map sun20i_d1_r_ccu_resets[] = {

static const struct ccu_reset_map sun20i_d1_r_ccu_resets[] = {

	[RST_BUS_R_TIMER]	= { 0x11c, BIT(16) },

	[RST_BUS_R_TWD]		= { 0x12c, BIT(16) },

	[RST_BUS_R_PPU]		= { 0x1ac, BIT(16) },

drivers/clk/sunxi-ng/ccu-sun20i-d1.c

+2 −2
Original line number Diff line number Diff line
@@ -1232,7 +1232,7 @@ static struct clk_hw_onecell_data sun20i_d1_hw_clks = { 
	},

};



static struct ccu_reset_map sun20i_d1_ccu_resets[] = {

static const struct ccu_reset_map sun20i_d1_ccu_resets[] = {

	[RST_MBUS]		= { 0x540, BIT(30) },

	[RST_BUS_DE]		= { 0x60c, BIT(16) },

	[RST_BUS_DI]		= { 0x62c, BIT(16) },
@@ -1371,7 +1371,7 @@ static int sun20i_d1_ccu_probe(struct platform_device *pdev) 


	/* Enforce m1 = 0, m0 = 0 for PLL_AUDIO0 */

	val = readl(reg + SUN20I_D1_PLL_AUDIO0_REG);

	val &= ~BIT(1) | BIT(0);

	val &= ~(BIT(1) | BIT(0));

	writel(val, reg + SUN20I_D1_PLL_AUDIO0_REG);



	/* Force fanout-27M factor N to 0. */

drivers/clk/sunxi-ng/ccu-sun4i-a10.c

+1 −1
Original line number Diff line number Diff line
@@ -1382,7 +1382,7 @@ static struct clk_hw_onecell_data sun7i_a20_hw_clks = { 
	.num	= CLK_NUMBER_SUN7I,

};



static struct ccu_reset_map sunxi_a10_a20_ccu_resets[] = {

static const struct ccu_reset_map sunxi_a10_a20_ccu_resets[] = {

	[RST_USB_PHY0]		= { 0x0cc, BIT(0) },

	[RST_USB_PHY1]		= { 0x0cc, BIT(1) },

	[RST_USB_PHY2]		= { 0x0cc, BIT(2) },

drivers/clk/sunxi-ng/ccu-sun50i-a100-r.c

+1 −1
Original line number Diff line number Diff line
@@ -166,7 +166,7 @@ static struct clk_hw_onecell_data sun50i_a100_r_hw_clks = { 
	.num	= CLK_NUMBER,

};



static struct ccu_reset_map sun50i_a100_r_ccu_resets[] = {

static const struct ccu_reset_map sun50i_a100_r_ccu_resets[] = {

	[RST_R_APB1_TIMER]	=  { 0x11c, BIT(16) },

	[RST_R_APB1_BUS_PWM]	=  { 0x13c, BIT(16) },

	[RST_R_APB1_PPU]	=  { 0x17c, BIT(16) },

drivers/clk/sunxi-ng/ccu-sun50i-a100.c

+1 −1
Original line number Diff line number Diff line
@@ -1061,7 +1061,7 @@ static struct clk_hw_onecell_data sun50i_a100_hw_clks = { 
	.num = CLK_NUMBER,

};



static struct ccu_reset_map sun50i_a100_ccu_resets[] = {

static const struct ccu_reset_map sun50i_a100_ccu_resets[] = {

	[RST_MBUS]		= { 0x540, BIT(30) },



	[RST_BUS_DE]		= { 0x60c, BIT(16) },