Commit eb57cbe7 authored by Abel Vesa's avatar Abel Vesa Committed by Bjorn Andersson
Browse files

arm64: dts: qcom: x1e80100: Describe the PCIe 6a resources 



On both the CRD and QCP, on PCIe 6a sits the NVMe. Add the 3.3V
gpio-controlled regulator and the clkreq, perst and wake gpios as
resources for the PCIe 6a.

Signed-off-by: default avatarAbel Vesa <abel.vesa@linaro.org>
Reviewed-by: default avatarDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20240530-x1e80100-dts-pcie6a-v1-3-ee17a9939ba5@linaro.org


Signed-off-by: default avatarBjorn Andersson <andersson@kernel.org>
parent 87042003

arch/arm64/boot/dts/qcom/x1e80100-crd.dts

+52 −0
Original line number Diff line number Diff line
@@ -164,6 +164,20 @@ vreg_edp_3p3: regulator-edp-3p3 { 
		regulator-always-on;

		regulator-boot-on;

	};



	vreg_nvme: regulator-nvme {

		compatible = "regulator-fixed";



		regulator-name = "VREG_NVME_3P3";

		regulator-min-microvolt = <3300000>;

		regulator-max-microvolt = <3300000>;



		gpio = <&tlmm 18 GPIO_ACTIVE_HIGH>;

		enable-active-high;



		pinctrl-names = "default";

		pinctrl-0 = <&nvme_reg_en>;

	};

};



&apps_rsc {
@@ -646,6 +660,14 @@ &pcie4_phy { 
};



&pcie6a {

	perst-gpios = <&tlmm 152 GPIO_ACTIVE_LOW>;

	wake-gpios = <&tlmm 154 GPIO_ACTIVE_LOW>;



	vddpe-3v3-supply = <&vreg_nvme>;



	pinctrl-names = "default";

	pinctrl-0 = <&pcie6a_default>;



	status = "okay";

};
@@ -795,6 +817,36 @@ kybd_default: kybd-default-state { 
		bias-disable;

	};



	nvme_reg_en: nvme-reg-en-state {

		pins = "gpio18";

		function = "gpio";

		drive-strength = <2>;

		bias-disable;

	};



	pcie6a_default: pcie2a-default-state {

		clkreq-n-pins {

			pins = "gpio153";

			function = "pcie6a_clk";

			drive-strength = <2>;

			bias-pull-up;

		};



		perst-n-pins {

			pins = "gpio152";

			function = "gpio";

			drive-strength = <2>;

			bias-pull-down;

		};



		wake-n-pins {

		       pins = "gpio154";

		       function = "gpio";

		       drive-strength = <2>;

		       bias-pull-up;

	       };

	};



	tpad_default: tpad-default-state {

		pins = "gpio3";

		function = "gpio";

arch/arm64/boot/dts/qcom/x1e80100-qcp.dts

+52 −0
Original line number Diff line number Diff line
@@ -50,6 +50,20 @@ vreg_edp_3p3: regulator-edp-3p3 { 
		regulator-always-on;

		regulator-boot-on;

	};



	vreg_nvme: regulator-nvme {

		compatible = "regulator-fixed";



		regulator-name = "VREG_NVME_3P3";

		regulator-min-microvolt = <3300000>;

		regulator-max-microvolt = <3300000>;



		gpio = <&tlmm 18 GPIO_ACTIVE_HIGH>;

		enable-active-high;



		pinctrl-names = "default";

		pinctrl-0 = <&nvme_reg_en>;

	};

};



&apps_rsc {
@@ -457,6 +471,14 @@ &pcie4_phy { 
};



&pcie6a {

	perst-gpios = <&tlmm 152 GPIO_ACTIVE_LOW>;

	wake-gpios = <&tlmm 154 GPIO_ACTIVE_LOW>;



	vddpe-3v3-supply = <&vreg_nvme>;



	pinctrl-names = "default";

	pinctrl-0 = <&pcie6a_default>;



	status = "okay";

};
@@ -519,6 +541,36 @@ edp_reg_en: edp-reg-en-state { 
		drive-strength = <16>;

		bias-disable;

	};



	nvme_reg_en: nvme-reg-en-state {

		pins = "gpio18";

		function = "gpio";

		drive-strength = <2>;

		bias-disable;

	};



	pcie6a_default: pcie2a-default-state {

		clkreq-n-pins {

			pins = "gpio153";

			function = "pcie6a_clk";

			drive-strength = <2>;

			bias-pull-up;

		};



		perst-n-pins {

			pins = "gpio152";

			function = "gpio";

			drive-strength = <2>;

			bias-pull-down;

		};



		wake-n-pins {

		       pins = "gpio154";

		       function = "gpio";

		       drive-strength = <2>;

		       bias-pull-up;

	       };

	};

};



&uart21 {