Commit ebd7e37a authored by Pali Rohár's avatar Pali Rohár Committed by Greg Kroah-Hartman
Browse files

dt-bindings: mvebu-uart: update information about UART clock 



Device "marvell,armada-3700-uart" should use
"marvell,armada-3700-uart-clock" compatible clock.

Reviewed-by: default avatarRob Herring <robh@kernel.org>
Reviewed-by: default avatarMarek Behún <kabel@kernel.org>
Reviewed-by: default avatarStephen Boyd <sboyd@kernel.org>
Signed-off-by: default avatarPali Rohár <pali@kernel.org>
Signed-off-by: default avatarMarek Behún <kabel@kernel.org>
Link: https://lore.kernel.org/r/20220219152818.4319-5-kabel@kernel.org


Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent b7e2b536

Documentation/devicetree/bindings/serial/mvebu-uart.txt

+6 −3
Original line number Diff line number Diff line
@@ -14,7 +14,10 @@ Required properties: 
      is provided (possible only with the "marvell,armada-3700-uart"

      compatible string for backward compatibility), it will only work

      if the baudrate was initialized by the bootloader and no baudrate

      change will then be possible.

      change will then be possible. When provided it should be UART1-clk

      for standard variant of UART and UART2-clk for extended variant

      of UART. TBG clock (with UART TBG divisors d1=d2=1) or xtal clock

      should not be used and are supported only for backward compatibility.

- interrupts:

    - Must contain three elements for the standard variant of the IP

      (marvell,armada-3700-uart): "uart-sum", "uart-tx" and "uart-rx",
@@ -34,7 +37,7 @@ Example: 
	uart0: serial@12000 {

		compatible = "marvell,armada-3700-uart";

		reg = <0x12000 0x18>;

		clocks = <&xtalclk>;

		clocks = <&uartclk 0>;

		interrupts =

		<GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,

		<GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
@@ -45,7 +48,7 @@ Example: 
	uart1: serial@12200 {

		compatible = "marvell,armada-3700-uart-ext";

		reg = <0x12200 0x30>;

		clocks = <&xtalclk>;

		clocks = <&uartclk 1>;

		interrupts =

		<GIC_SPI 30 IRQ_TYPE_EDGE_RISING>,

		<GIC_SPI 31 IRQ_TYPE_EDGE_RISING>;