Commit eceddd01 authored by Trevor Gamblin's avatar Trevor Gamblin Committed by Jonathan Cameron
Browse files

iio: gyro: mpu3050-core: make use of regmap_clear_bits(), regmap_set_bits() 



Instead of using regmap_update_bits() and passing the mask twice, use
regmap_set_bits().

Instead of using regmap_update_bits() and passing val = 0, use
regmap_clear_bits().

Suggested-by: default avatarUwe Kleine-König <u.kleine-koenig@baylibre.com>
Signed-off-by: default avatarTrevor Gamblin <tgamblin@baylibre.com>
Acked-by: default avatarUwe Kleine-König <u.kleine-koenig@baylibre.com>
Link: https://patch.msgid.link/20240617-review-v3-22-88d1338c4cca@baylibre.com


Signed-off-by: default avatarJonathan Cameron <Jonathan.Cameron@huawei.com>
parent e5757bd8

drivers/iio/gyro/mpu3050-core.c

+14 −21
Original line number Diff line number Diff line
@@ -197,8 +197,8 @@ static int mpu3050_start_sampling(struct mpu3050 *mpu3050) 
	int i;



	/* Reset */

	ret = regmap_update_bits(mpu3050->map, MPU3050_PWR_MGM,

				 MPU3050_PWR_MGM_RESET, MPU3050_PWR_MGM_RESET);

	ret = regmap_set_bits(mpu3050->map, MPU3050_PWR_MGM,

			      MPU3050_PWR_MGM_RESET);

	if (ret)

		return ret;
@@ -513,10 +513,7 @@ static irqreturn_t mpu3050_trigger_handler(int irq, void *p) 
				 "FIFO overflow! Emptying and resetting FIFO\n");

			fifo_overflow = true;

			/* Reset and enable the FIFO */

			ret = regmap_update_bits(mpu3050->map,

						 MPU3050_USR_CTRL,

						 MPU3050_USR_CTRL_FIFO_EN |

						 MPU3050_USR_CTRL_FIFO_RST,

			ret = regmap_set_bits(mpu3050->map, MPU3050_USR_CTRL,

					      MPU3050_USR_CTRL_FIFO_EN |

					      MPU3050_USR_CTRL_FIFO_RST);

			if (ret) {
@@ -799,9 +796,7 @@ static int mpu3050_hw_init(struct mpu3050 *mpu3050) 
	u64 otp;



	/* Reset */

	ret = regmap_update_bits(mpu3050->map,

				 MPU3050_PWR_MGM,

				 MPU3050_PWR_MGM_RESET,

	ret = regmap_set_bits(mpu3050->map, MPU3050_PWR_MGM,

			      MPU3050_PWR_MGM_RESET);

	if (ret)

		return ret;
@@ -872,8 +867,8 @@ static int mpu3050_power_up(struct mpu3050 *mpu3050) 
	msleep(200);



	/* Take device out of sleep mode */

	ret = regmap_update_bits(mpu3050->map, MPU3050_PWR_MGM,

				 MPU3050_PWR_MGM_SLEEP, 0);

	ret = regmap_clear_bits(mpu3050->map, MPU3050_PWR_MGM,

				MPU3050_PWR_MGM_SLEEP);

	if (ret) {

		regulator_bulk_disable(ARRAY_SIZE(mpu3050->regs), mpu3050->regs);

		dev_err(mpu3050->dev, "error setting power mode\n");
@@ -895,8 +890,8 @@ static int mpu3050_power_down(struct mpu3050 *mpu3050) 
	 * then we would be wasting power unless we go to sleep mode

	 * first.

	 */

	ret = regmap_update_bits(mpu3050->map, MPU3050_PWR_MGM,

				 MPU3050_PWR_MGM_SLEEP, MPU3050_PWR_MGM_SLEEP);

	ret = regmap_set_bits(mpu3050->map, MPU3050_PWR_MGM,

			      MPU3050_PWR_MGM_SLEEP);

	if (ret)

		dev_err(mpu3050->dev, "error putting to sleep\n");
@@ -997,9 +992,7 @@ static int mpu3050_drdy_trigger_set_state(struct iio_trigger *trig, 
			return ret;



		/* Reset and enable the FIFO */

		ret = regmap_update_bits(mpu3050->map, MPU3050_USR_CTRL,

					 MPU3050_USR_CTRL_FIFO_EN |

					 MPU3050_USR_CTRL_FIFO_RST,

		ret = regmap_set_bits(mpu3050->map, MPU3050_USR_CTRL,

				      MPU3050_USR_CTRL_FIFO_EN |

				      MPU3050_USR_CTRL_FIFO_RST);

		if (ret)