Commit ee5a1321 authored by Jesus Narvaez's avatar Jesus Narvaez Committed by Daniele Ceraolo Spurio
Browse files

drm/xe/guc: Adding steering info support for GuC register lists 



The guc_mmio_reg interface supports steering, but it is currently not
implemented. This will allow the GuC to control steering of MMIO
registers after save-restore and avoid reading from fused off MCR
register instances.

Fixes: 9c57bc08 ("drm/xe/lnl: Drop force_probe requirement")
Signed-off-by: default avatarJesus Narvaez <jesus.narvaez@intel.com>
Cc: Matt Roper <matthew.d.roper@intel.com>
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Reviewed-by: default avatarJonathan Cavitt <jonathan.cavitt@intel.com>
Signed-off-by: default avatarDaniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20241212190100.3768068-1-jesus.narvaez@intel.com
parent 75fd04f2

drivers/gpu/drm/xe/xe_gt_mcr.c

+3 −3
Original line number Diff line number Diff line
@@ -550,7 +550,7 @@ void xe_gt_mcr_set_implicit_defaults(struct xe_gt *gt) 
 * Returns true if the caller should steer to the @group/@instance values

 * returned.  Returns false if the caller need not perform any steering

 */

static bool xe_gt_mcr_get_nonterminated_steering(struct xe_gt *gt,

bool xe_gt_mcr_get_nonterminated_steering(struct xe_gt *gt,

					  struct xe_reg_mcr reg_mcr,

					  u8 *group, u8 *instance)

{

drivers/gpu/drm/xe/xe_gt_mcr.h

+4 −0
Original line number Diff line number Diff line
@@ -26,6 +26,10 @@ void xe_gt_mcr_unicast_write(struct xe_gt *gt, struct xe_reg_mcr mcr_reg, 
void xe_gt_mcr_multicast_write(struct xe_gt *gt, struct xe_reg_mcr mcr_reg,

			       u32 value);



bool xe_gt_mcr_get_nonterminated_steering(struct xe_gt *gt,

					  struct xe_reg_mcr reg_mcr,

					  u8 *group, u8 *instance);



void xe_gt_mcr_steering_dump(struct xe_gt *gt, struct drm_printer *p);

void xe_gt_mcr_get_dss_steering(struct xe_gt *gt, unsigned int dss, u16 *group, u16 *instance);

u32 xe_gt_mcr_steering_info_to_dss_id(struct xe_gt *gt, u16 group, u16 instance);

drivers/gpu/drm/xe/xe_guc_ads.c

+15 −0
Original line number Diff line number Diff line
@@ -29,6 +29,7 @@ 
#include "xe_platform_types.h"

#include "xe_uc_fw.h"

#include "xe_wa.h"

#include "xe_gt_mcr.h"



/* Slack of a few additional entries per engine */

#define ADS_REGSET_EXTRA_MAX	8
@@ -696,6 +697,20 @@ static void guc_mmio_regset_write_one(struct xe_guc_ads *ads, 
		.flags = reg.masked ? GUC_REGSET_MASKED : 0,

	};



	if (reg.mcr) {

		struct xe_reg_mcr mcr_reg = XE_REG_MCR(reg.addr);

		u8 group, instance;



		bool steer = xe_gt_mcr_get_nonterminated_steering(ads_to_gt(ads), mcr_reg,

								  &group, &instance);



		if (steer) {

			entry.flags |= FIELD_PREP(GUC_REGSET_STEERING_GROUP, group);

			entry.flags |= FIELD_PREP(GUC_REGSET_STEERING_INSTANCE, instance);

			entry.flags |= GUC_REGSET_STEERING_NEEDED;

		}

	}



	xe_map_memcpy_to(ads_to_xe(ads), regset_map, n_entry * sizeof(entry),

			 &entry, sizeof(entry));

}