Commit f0acaf9d authored by Jani Nikula's avatar Jani Nikula
Browse files

drm/i915: move and group max_bw and bw_obj under display.bw 



Move display bandwidth related members under drm_i915_private display
sub-struct.

v2: Rebase

Signed-off-by: default avatarJani Nikula <jani.nikula@intel.com>
Reviewed-by: default avatarLucas De Marchi <lucas.demarchi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/c8b9e2fdc5c226ffb71759a20e561c832a774ba5.1661779055.git.jani.nikula@intel.com
parent eb11eabc

drivers/gpu/drm/i915/display/intel_bw.c

+21 −21
Original line number Diff line number Diff line
@@ -324,7 +324,7 @@ static int icl_get_bw_info(struct drm_i915_private *dev_priv, const struct intel 
	int ipqdepth, ipqdepthpch = 16;

	int dclk_max;

	int maxdebw;

	int num_groups = ARRAY_SIZE(dev_priv->max_bw);

	int num_groups = ARRAY_SIZE(dev_priv->display.bw.max);

	int i, ret;



	ret = icl_get_qgv_points(dev_priv, &qi, is_y_tile);
@@ -340,7 +340,7 @@ static int icl_get_bw_info(struct drm_i915_private *dev_priv, const struct intel 
	qi.deinterleave = DIV_ROUND_UP(num_channels, is_y_tile ? 4 : 2);



	for (i = 0; i < num_groups; i++) {

		struct intel_bw_info *bi = &dev_priv->max_bw[i];

		struct intel_bw_info *bi = &dev_priv->display.bw.max[i];

		int clpchgroup;

		int j;
@@ -395,7 +395,7 @@ static int tgl_get_bw_info(struct drm_i915_private *dev_priv, const struct intel 
	int dclk_max;

	int maxdebw, peakbw;

	int clperchgroup;

	int num_groups = ARRAY_SIZE(dev_priv->max_bw);

	int num_groups = ARRAY_SIZE(dev_priv->display.bw.max);

	int i, ret;



	ret = icl_get_qgv_points(dev_priv, &qi, is_y_tile);
@@ -431,7 +431,7 @@ static int tgl_get_bw_info(struct drm_i915_private *dev_priv, const struct intel 
	clperchgroup = 4 * DIV_ROUND_UP(8, num_channels) * qi.deinterleave;



	for (i = 0; i < num_groups; i++) {

		struct intel_bw_info *bi = &dev_priv->max_bw[i];

		struct intel_bw_info *bi = &dev_priv->display.bw.max[i];

		struct intel_bw_info *bi_next;

		int clpchgroup;

		int j;
@@ -439,7 +439,7 @@ static int tgl_get_bw_info(struct drm_i915_private *dev_priv, const struct intel 
		clpchgroup = (sa->deburst * qi.deinterleave / num_channels) << i;



		if (i < num_groups - 1) {

			bi_next = &dev_priv->max_bw[i + 1];

			bi_next = &dev_priv->display.bw.max[i + 1];



			if (clpchgroup < clperchgroup)

				bi_next->num_planes = (ipqdepth - clpchgroup) /
@@ -500,7 +500,7 @@ static int tgl_get_bw_info(struct drm_i915_private *dev_priv, const struct intel 
static void dg2_get_bw_info(struct drm_i915_private *i915)

{

	unsigned int deratedbw = IS_DG2_G11(i915) ? 38000 : 50000;

	int num_groups = ARRAY_SIZE(i915->max_bw);

	int num_groups = ARRAY_SIZE(i915->display.bw.max);

	int i;



	/*
@@ -511,7 +511,7 @@ static void dg2_get_bw_info(struct drm_i915_private *i915) 
	 * whereas DG2-G11 platforms have 38 GB/s.

	 */

	for (i = 0; i < num_groups; i++) {

		struct intel_bw_info *bi = &i915->max_bw[i];

		struct intel_bw_info *bi = &i915->display.bw.max[i];



		bi->num_planes = 1;

		/* Need only one dummy QGV point per group */
@@ -532,9 +532,9 @@ static unsigned int icl_max_bw(struct drm_i915_private *dev_priv, 
	 */

	num_planes = max(1, num_planes);



	for (i = 0; i < ARRAY_SIZE(dev_priv->max_bw); i++) {

	for (i = 0; i < ARRAY_SIZE(dev_priv->display.bw.max); i++) {

		const struct intel_bw_info *bi =

			&dev_priv->max_bw[i];

			&dev_priv->display.bw.max[i];



		/*

		 * Pcode will not expose all QGV points when
@@ -560,9 +560,9 @@ static unsigned int tgl_max_bw(struct drm_i915_private *dev_priv, 
	 */

	num_planes = max(1, num_planes);



	for (i = ARRAY_SIZE(dev_priv->max_bw) - 1; i >= 0; i--) {

	for (i = ARRAY_SIZE(dev_priv->display.bw.max) - 1; i >= 0; i--) {

		const struct intel_bw_info *bi =

			&dev_priv->max_bw[i];

			&dev_priv->display.bw.max[i];



		/*

		 * Pcode will not expose all QGV points when
@@ -575,14 +575,14 @@ static unsigned int tgl_max_bw(struct drm_i915_private *dev_priv, 
			return bi->deratedbw[qgv_point];

	}



	return dev_priv->max_bw[0].deratedbw[qgv_point];

	return dev_priv->display.bw.max[0].deratedbw[qgv_point];

}



static unsigned int adl_psf_bw(struct drm_i915_private *dev_priv,

			       int psf_gv_point)

{

	const struct intel_bw_info *bi =

			&dev_priv->max_bw[0];

			&dev_priv->display.bw.max[0];



	return bi->psf_bw[psf_gv_point];

}
@@ -703,7 +703,7 @@ intel_atomic_get_old_bw_state(struct intel_atomic_state *state) 
	struct drm_i915_private *dev_priv = to_i915(state->base.dev);

	struct intel_global_state *bw_state;



	bw_state = intel_atomic_get_old_global_obj_state(state, &dev_priv->bw_obj);

	bw_state = intel_atomic_get_old_global_obj_state(state, &dev_priv->display.bw.obj);



	return to_intel_bw_state(bw_state);

}
@@ -714,7 +714,7 @@ intel_atomic_get_new_bw_state(struct intel_atomic_state *state) 
	struct drm_i915_private *dev_priv = to_i915(state->base.dev);

	struct intel_global_state *bw_state;



	bw_state = intel_atomic_get_new_global_obj_state(state, &dev_priv->bw_obj);

	bw_state = intel_atomic_get_new_global_obj_state(state, &dev_priv->display.bw.obj);



	return to_intel_bw_state(bw_state);

}
@@ -725,7 +725,7 @@ intel_atomic_get_bw_state(struct intel_atomic_state *state) 
	struct drm_i915_private *dev_priv = to_i915(state->base.dev);

	struct intel_global_state *bw_state;



	bw_state = intel_atomic_get_global_obj_state(state, &dev_priv->bw_obj);

	bw_state = intel_atomic_get_global_obj_state(state, &dev_priv->display.bw.obj);

	if (IS_ERR(bw_state))

		return ERR_CAST(bw_state);
@@ -932,8 +932,8 @@ int intel_bw_calc_min_cdclk(struct intel_atomic_state *state, 


static u16 icl_qgv_points_mask(struct drm_i915_private *i915)

{

	unsigned int num_psf_gv_points = i915->max_bw[0].num_psf_gv_points;

	unsigned int num_qgv_points = i915->max_bw[0].num_qgv_points;

	unsigned int num_psf_gv_points = i915->display.bw.max[0].num_psf_gv_points;

	unsigned int num_qgv_points = i915->display.bw.max[0].num_qgv_points;

	u16 qgv_points = 0, psf_points = 0;



	/*
@@ -1006,8 +1006,8 @@ int intel_bw_atomic_check(struct intel_atomic_state *state) 
	int i, ret;

	u16 qgv_points = 0, psf_points = 0;

	unsigned int max_bw_point = 0, max_bw = 0;

	unsigned int num_qgv_points = dev_priv->max_bw[0].num_qgv_points;

	unsigned int num_psf_gv_points = dev_priv->max_bw[0].num_psf_gv_points;

	unsigned int num_qgv_points = dev_priv->display.bw.max[0].num_qgv_points;

	unsigned int num_psf_gv_points = dev_priv->display.bw.max[0].num_psf_gv_points;

	bool changed = false;



	/* FIXME earlier gens need some checks too */
@@ -1162,7 +1162,7 @@ int intel_bw_init(struct drm_i915_private *dev_priv) 
	if (!state)

		return -ENOMEM;



	intel_atomic_global_obj_init(dev_priv, &dev_priv->bw_obj,

	intel_atomic_global_obj_init(dev_priv, &dev_priv->display.bw.obj,

				     &state->base, &intel_bw_funcs);



	return 0;

drivers/gpu/drm/i915/display/intel_display_core.h

+21 −0
Original line number Diff line number Diff line
@@ -14,6 +14,7 @@ 
#include "intel_display.h"

#include "intel_dmc.h"

#include "intel_dpll_mgr.h"

#include "intel_global_state.h"

#include "intel_gmbus.h"

#include "intel_pm_types.h"
@@ -34,6 +35,12 @@ struct intel_hotplug_funcs; 
struct intel_initial_plane_config;

struct intel_overlay;



/* Amount of SAGV/QGV points, BSpec precisely defines this */

#define I915_NUM_QGV_POINTS 8



/* Amount of PSF GV points, BSpec precisely defines this */

#define I915_NUM_PSF_GV_POINTS 3



struct intel_display_funcs {

	/*

	 * Returns the active state of the crtc, and if the crtc is active,
@@ -208,6 +215,20 @@ struct intel_display { 
	} funcs;



	/* Grouping using anonymous structs. Keep sorted. */

	struct {

		struct intel_global_obj obj;



		struct intel_bw_info {

			/* for each QGV point */

			unsigned int deratedbw[I915_NUM_QGV_POINTS];

			/* for each PSF GV point */

			unsigned int psf_bw[I915_NUM_PSF_GV_POINTS];

			u8 num_qgv_points;

			u8 num_psf_gv_points;

			u8 num_planes;

		} max[6];

	} bw;



	struct {

		/* list of fbdev register on this device */

		struct intel_fbdev *fbdev;

drivers/gpu/drm/i915/display/intel_modeset_setup.c

+2 −2
Original line number Diff line number Diff line
@@ -30,7 +30,7 @@ static void intel_crtc_disable_noatomic(struct intel_crtc *crtc, 
	struct intel_encoder *encoder;

	struct drm_i915_private *i915 = to_i915(crtc->base.dev);

	struct intel_bw_state *bw_state =

		to_intel_bw_state(i915->bw_obj.state);

		to_intel_bw_state(i915->display.bw.obj.state);

	struct intel_cdclk_state *cdclk_state =

		to_intel_cdclk_state(i915->cdclk.obj.state);

	struct intel_dbuf_state *dbuf_state =
@@ -535,7 +535,7 @@ static void intel_modeset_readout_hw_state(struct drm_i915_private *i915) 


	for_each_intel_crtc(&i915->drm, crtc) {

		struct intel_bw_state *bw_state =

			to_intel_bw_state(i915->bw_obj.state);

			to_intel_bw_state(i915->display.bw.obj.state);

		struct intel_crtc_state *crtc_state =

			to_intel_crtc_state(crtc->base.state);

		struct intel_plane *plane;

drivers/gpu/drm/i915/i915_drv.h

+0 −19
Original line number Diff line number Diff line
@@ -44,7 +44,6 @@ 
#include "display/intel_dsb.h"

#include "display/intel_fbc.h"

#include "display/intel_frontbuffer.h"

#include "display/intel_global_state.h"

#include "display/intel_opregion.h"



#include "gem/i915_gem_context_types.h"
@@ -204,14 +203,8 @@ i915_fence_timeout(const struct drm_i915_private *i915) 
	return i915_fence_context_timeout(i915, U64_MAX);

}



/* Amount of SAGV/QGV points, BSpec precisely defines this */

#define I915_NUM_QGV_POINTS 8



#define HAS_HW_SAGV_WM(i915) (DISPLAY_VER(i915) >= 13 && !IS_DGFX(i915))



/* Amount of PSF GV points, BSpec precisely defines this */

#define I915_NUM_PSF_GV_POINTS 3



struct intel_vbt_data {

	/* bdb version */

	u16 version;
@@ -470,18 +463,6 @@ struct drm_i915_private { 
		u8 num_psf_gv_points;

	} dram_info;



	struct intel_bw_info {

		/* for each QGV point */

		unsigned int deratedbw[I915_NUM_QGV_POINTS];

		/* for each PSF GV point */

		unsigned int psf_bw[I915_NUM_PSF_GV_POINTS];

		u8 num_qgv_points;

		u8 num_psf_gv_points;

		u8 num_planes;

	} max_bw[6];



	struct intel_global_obj bw_obj;



	struct intel_runtime_pm runtime_pm;



	struct i915_perf perf;