Commit f0da1934 authored by Ville Syrjälä's avatar Ville Syrjälä
Browse files

drm/i915/dp: Don't switch to idle pattern before disable on pre-hsw 



For some reason we are switching over to the idle pattern before
disabling the DP port on pre-hsw. AFAICS this has never been part
of the documented sequence (and on hsw+ the spec explicitly says
not to do this). Get rid of it.

The code goes all the way back to commit 5eb08b69 ("drm/i915: enable
DisplayPort support on IGDNG"), and it was accompanied by a 17ms delay
which got changed to vbl wait in commit ab527efc ("drm/i915: use
wait_for_vblank instead of msleep(17)"), and was later completely removed
in  commit 93c9c19b ("drm/i915: remove unexplained vblank wait in
the DP off code").

Smoke tested on g4x/snb/chv.

Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20250710201718.25310-3-ville.syrjala@linux.intel.com


Reviewed-by: default avatarImre Deak <imre.deak@intel.com>
parent a8b87469

drivers/gpu/drm/i915/display/g4x_dp.c

+0 −11
Original line number Diff line number Diff line
@@ -424,17 +424,6 @@ intel_dp_link_down(struct intel_encoder *encoder, 


	drm_dbg_kms(display->drm, "\n");



	if ((display->platform.ivybridge && port == PORT_A) ||

	    (HAS_PCH_CPT(display) && port != PORT_A)) {

		intel_dp->DP &= ~DP_LINK_TRAIN_MASK_CPT;

		intel_dp->DP |= DP_LINK_TRAIN_PAT_IDLE_CPT;

	} else {

		intel_dp->DP &= ~DP_LINK_TRAIN_MASK;

		intel_dp->DP |= DP_LINK_TRAIN_PAT_IDLE;

	}

	intel_de_write(display, intel_dp->output_reg, intel_dp->DP);

	intel_de_posting_read(display, intel_dp->output_reg);



	intel_dp->DP &= ~DP_PORT_EN;

	intel_de_write(display, intel_dp->output_reg, intel_dp->DP);

	intel_de_posting_read(display, intel_dp->output_reg);