Commit f21b075b authored by Tony Luck's avatar Tony Luck Committed by Borislav Petkov (AMD)
Browse files

x86/tsc: Switch to new Intel CPU model defines 



New CPU #defines encode vendor and family as well as model.

Signed-off-by: default avatarTony Luck <tony.luck@intel.com>
Signed-off-by: default avatarDave Hansen <dave.hansen@linux.intel.com>
Signed-off-by: default avatarBorislav Petkov (AMD) <bp@alien8.de>
Link: https://lore.kernel.org/all/20240424181517.41907-1-tony.luck%40intel.com
parent 4db64279

arch/x86/kernel/tsc.c

+3 −3
Original line number Diff line number Diff line
@@ -26,7 +26,7 @@ 
#include <asm/x86_init.h>

#include <asm/geode.h>

#include <asm/apic.h>

#include <asm/intel-family.h>

#include <asm/cpu_device_id.h>

#include <asm/i8259.h>

#include <asm/uv/uv.h>
@@ -682,7 +682,7 @@ unsigned long native_calibrate_tsc(void) 
	 * clock.

	 */

	if (crystal_khz == 0 &&

			boot_cpu_data.x86_model == INTEL_FAM6_ATOM_GOLDMONT_D)

			boot_cpu_data.x86_vfm == INTEL_ATOM_GOLDMONT_D)

		crystal_khz = 25000;



	/*
@@ -713,7 +713,7 @@ unsigned long native_calibrate_tsc(void) 
	 * For Atom SoCs TSC is the only reliable clocksource.

	 * Mark TSC reliable so no watchdog on it.

	 */

	if (boot_cpu_data.x86_model == INTEL_FAM6_ATOM_GOLDMONT)

	if (boot_cpu_data.x86_vfm == INTEL_ATOM_GOLDMONT)

		setup_force_cpu_cap(X86_FEATURE_TSC_RELIABLE);



#ifdef CONFIG_X86_LOCAL_APIC