Commit f550694e authored by Yael Chemla's avatar Yael Chemla Committed by Leon Romanovsky
Browse files

net/mlx5: Add IFC bits for PPCNT recovery counters group



Add recovery counters group layout of PPCNT (Ports Performance Counters
Register). This group counts recovery events per link. Also add the
corresponding bit in PCAM to indicate this group is supported.

Signed-off-by: default avatarYael Chemla <ychemla@nvidia.com>
Reviewed-by: default avatarCosmin Ratiu <cratiu@nvidia.com>
Signed-off-by: default avatarTariq Toukan <tariqt@nvidia.com>
Link: https://patch.msgid.link/1741545697-23041-1-git-send-email-tariqt@nvidia.com


Signed-off-by: default avatarLeon Romanovsky <leon@kernel.org>
parent 15b103df
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+1 −0
Original line number Diff line number Diff line
@@ -1517,6 +1517,7 @@ enum {
	MLX5_PHYSICAL_LAYER_COUNTERS_GROUP    = 0x12,
	MLX5_PER_TRAFFIC_CLASS_CONGESTION_GROUP = 0x13,
	MLX5_PHYSICAL_LAYER_STATISTICAL_GROUP = 0x16,
	MLX5_PHYSICAL_LAYER_RECOVERY_GROUP    = 0x1a,
	MLX5_INFINIBAND_PORT_COUNTERS_GROUP   = 0x20,
	MLX5_INFINIBAND_EXTENDED_PORT_COUNTERS_GROUP = 0x21,
};
+10 −1
Original line number Diff line number Diff line
@@ -2645,6 +2645,12 @@ struct mlx5_ifc_field_select_802_1qau_rp_bits {
	u8         field_select_8021qaurp[0x20];
};

struct mlx5_ifc_phys_layer_recovery_cntrs_bits {
	u8         total_successful_recovery_events[0x20];

	u8         reserved_at_20[0x7a0];
};

struct mlx5_ifc_phys_layer_cntrs_bits {
	u8         time_since_last_clear_high[0x20];

@@ -4846,6 +4852,7 @@ union mlx5_ifc_eth_cntrs_grp_data_layout_auto_bits {
	struct mlx5_ifc_ib_ext_port_cntrs_grp_data_layout_bits ib_ext_port_cntrs_grp_data_layout;
	struct mlx5_ifc_phys_layer_cntrs_bits phys_layer_cntrs;
	struct mlx5_ifc_phys_layer_statistical_cntrs_bits phys_layer_statistical_cntrs;
	struct mlx5_ifc_phys_layer_recovery_cntrs_bits phys_layer_recovery_cntrs;
	u8         reserved_at_0[0x7c0];
};

@@ -10584,7 +10591,9 @@ struct mlx5_ifc_mtutc_reg_bits {
};

struct mlx5_ifc_pcam_enhanced_features_bits {
	u8         reserved_at_0[0x1d];
	u8         reserved_at_0[0x10];
	u8         ppcnt_recovery_counters[0x1];
	u8         reserved_at_11[0xc];
	u8         fec_200G_per_lane_in_pplm[0x1];
	u8         reserved_at_1e[0x2a];
	u8         fec_100G_per_lane_in_pplm[0x1];