Commit f7774633 authored by Subbaraya Sundeep's avatar Subbaraya Sundeep Committed by Paolo Abeni
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octeontx2-af: Accommodate more bandwidth profiles for cn20k 



CN20K has 16k of leaf profiles, 2k of middle profiles and
256 of top profiles. This patch modifies existing receive
queue and bandwidth profile context structures to accommodate
additional profiles of cn20k.

Signed-off-by: default avatarSubbaraya Sundeep <sbhatta@marvell.com>
Link: https://patch.msgid.link/1761388367-16579-10-git-send-email-sbhatta@marvell.com


Signed-off-by: default avatarPaolo Abeni <pabeni@redhat.com>
parent 81f12533

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

+17 −5
Original line number Diff line number Diff line
@@ -5818,6 +5818,8 @@ static void nix_ipolicer_freemem(struct rvu *rvu, struct nix_hw *nix_hw) 
	}

}



#define NIX_BW_PROF_HI_MASK	GENMASK(10, 7)



static int nix_verify_bandprof(struct nix_cn10k_aq_enq_req *req,

			       struct nix_hw *nix_hw, u16 pcifunc)

{
@@ -5856,7 +5858,8 @@ static int nix_verify_bandprof(struct nix_cn10k_aq_enq_req *req, 
		return -EINVAL;



	ipolicer = &nix_hw->ipolicer[hi_layer];

	prof_idx = req->prof.band_prof_id;

	prof_idx = FIELD_PREP(NIX_BW_PROF_HI_MASK, req->prof.band_prof_id_h);

	prof_idx |= req->prof.band_prof_id;

	if (prof_idx >= ipolicer->band_prof.max ||

	    ipolicer->pfvf_map[prof_idx] != pcifunc)

		return -EINVAL;
@@ -6021,8 +6024,10 @@ static int nix_ipolicer_map_leaf_midprofs(struct rvu *rvu, 
	aq_req->op = NIX_AQ_INSTOP_WRITE;

	aq_req->qidx = leaf_prof;



	aq_req->prof.band_prof_id = mid_prof;

	aq_req->prof.band_prof_id = mid_prof & 0x7F;

	aq_req->prof_mask.band_prof_id = GENMASK(6, 0);

	aq_req->prof.band_prof_id_h = FIELD_GET(NIX_BW_PROF_HI_MASK, mid_prof);

	aq_req->prof_mask.band_prof_id_h = GENMASK(3, 0);

	aq_req->prof.hl_en = 1;

	aq_req->prof_mask.hl_en = 1;
@@ -6031,6 +6036,8 @@ static int nix_ipolicer_map_leaf_midprofs(struct rvu *rvu, 
				       (struct nix_aq_enq_rsp *)aq_rsp);

}



#define NIX_RQ_PROF_HI_MASK	GENMASK(13, 10)



int rvu_nix_setup_ratelimit_aggr(struct rvu *rvu, u16 pcifunc,

				 u16 rq_idx, u16 match_id)

{
@@ -6062,7 +6069,8 @@ int rvu_nix_setup_ratelimit_aggr(struct rvu *rvu, u16 pcifunc, 
		return 0;



	/* Get the bandwidth profile ID mapped to this RQ */

	leaf_prof = aq_rsp.rq.band_prof_id;

	leaf_prof = FIELD_PREP(NIX_RQ_PROF_HI_MASK, aq_rsp.rq.band_prof_id_h);

	leaf_prof |= aq_rsp.rq.band_prof_id;



	ipolicer = &nix_hw->ipolicer[BAND_PROF_LEAF_LAYER];

	ipolicer->match_id[leaf_prof] = match_id;
@@ -6100,7 +6108,10 @@ int rvu_nix_setup_ratelimit_aggr(struct rvu *rvu, u16 pcifunc, 
		 * to different RQs and marked with same match_id

		 * are rate limited in a aggregate fashion

		 */

		mid_prof = aq_rsp.prof.band_prof_id;

		mid_prof = FIELD_PREP(NIX_BW_PROF_HI_MASK,

				      aq_rsp.prof.band_prof_id_h);

		mid_prof |= aq_rsp.prof.band_prof_id;



		rc = nix_ipolicer_map_leaf_midprofs(rvu, nix_hw,

						    &aq_req, &aq_rsp,

						    leaf_prof, mid_prof);
@@ -6222,7 +6233,8 @@ static void nix_clear_ratelimit_aggr(struct rvu *rvu, struct nix_hw *nix_hw, 
	if (!aq_rsp.prof.hl_en)

		return;



	mid_prof = aq_rsp.prof.band_prof_id;

	mid_prof = FIELD_PREP(NIX_BW_PROF_HI_MASK, aq_rsp.prof.band_prof_id_h);

	mid_prof |= aq_rsp.prof.band_prof_id;

	ipolicer = &nix_hw->ipolicer[BAND_PROF_MID_LAYER];

	ipolicer->ref_count[mid_prof]--;

	/* If ref_count is zero, free mid layer profile */

drivers/net/ethernet/marvell/octeontx2/af/rvu_struct.h

+4 −2
Original line number Diff line number Diff line
@@ -419,7 +419,8 @@ struct nix_cn10k_rq_ctx_s { 
	u64 rsvd_171		: 1;

	u64 later_skip		: 6;

	u64 xqe_imm_size	: 6;

	u64 rsvd_189_184	: 6;

	u64 band_prof_id_h	: 4;

	u64 rsvd_189_188	: 2;

	u64 xqe_imm_copy	: 1;

	u64 xqe_hdr_split	: 1;

	u64 xqe_drop		: 8; /* W3 */
@@ -757,7 +758,8 @@ struct nix_bandprof_s { 
	uint64_t rc_action                   :  2;

	uint64_t meter_algo                  :  2;

	uint64_t band_prof_id                :  7;

	uint64_t reserved_111_118            :  8;

	uint64_t band_prof_id_h              :  4;

	uint64_t reserved_115_118            :  4;

	uint64_t hl_en                       :  1;

	uint64_t reserved_120_127            :  8;

	uint64_t ts                          : 48; /* W2 */