Commit f8cd7272 authored by Alex Deucher's avatar Alex Deucher
Browse files

drm/amdgpu: Enable SMU 13.0.0 optimizations when ROCm is active (v2) 



When ROCm is active enable additional SMU 13.0.0 optimizations.
This reuses the unused powersave profile on PMFW.

v2: move to the swsmu code since we need both bits active in
    the workload mask.

Reviewed-by: default avatarHawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 2091ac69

drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c

+16 −1
Original line number Diff line number Diff line
@@ -2446,6 +2446,7 @@ static int smu_v13_0_0_set_power_profile_mode(struct smu_context *smu, 
	DpmActivityMonitorCoeffInt_t *activity_monitor =

		&(activity_monitor_external.DpmActivityMonitorCoeffInt);

	int workload_type, ret = 0;

	u32 workload_mask;



	smu->power_profile_mode = input[size];
@@ -2535,9 +2536,23 @@ static int smu_v13_0_0_set_power_profile_mode(struct smu_context *smu, 
	if (workload_type < 0)

		return -EINVAL;



	workload_mask = 1 << workload_type;



	/* Add optimizations for SMU13.0.0.  Reuse the power saving profile */

	if (smu->power_profile_mode == PP_SMC_POWER_PROFILE_COMPUTE &&

	    (amdgpu_ip_version(smu->adev, MP1_HWIP, 0) == IP_VERSION(13, 0, 0)) &&

	    ((smu->adev->pm.fw_version == 0x004e6601) ||

	     (smu->adev->pm.fw_version >= 0x004e7300))) {

		workload_type = smu_cmn_to_asic_specific_index(smu,

							       CMN2ASIC_MAPPING_WORKLOAD,

							       PP_SMC_POWER_PROFILE_POWERSAVING);

		if (workload_type >= 0)

			workload_mask |= 1 << workload_type;

	}



	return smu_cmn_send_smc_msg_with_param(smu,

					       SMU_MSG_SetWorkloadMask,

					       1 << workload_type,

					       workload_mask,

					       NULL);

}