Commit f92cfd72 authored by Piotr Piórkowski's avatar Piotr Piórkowski Committed by Lucas De Marchi
Browse files

drm/xe: Use dynamic allocation for tile and device VRAM region structures 



In future platforms, we will need to represent the device and tile
VRAM regions in a more dynamic way, so let's abandon the static
allocation of these structures and start use a dynamic allocation.

v2:
 - Add a helpers for accessing fields of the xe_vram_region structure
v3:
- Add missing EXPORT_SYMBOL_IF_KUNIT for
  xe_vram_region_actual_physical_size

Signed-off-by: default avatarPiotr Piórkowski <piotr.piorkowski@intel.com>
Cc: Stuart Summers <stuart.summers@intel.com>
Cc: Matthew Auld <matthew.auld@intel.com>
Cc: Satyanarayana K V P <satyanarayana.k.v.p@intel.com>
Reviewed-by: default avatarSatyanarayana K V P <satyanarayana.k.v.p@intel.com>
Acked-by: default avatarMatthew Brost <matthew.brost@intel.com>
Link: https://lore.kernel.org/r/20250714184818.89201-3-piotr.piorkowski@intel.com


Signed-off-by: default avatarLucas De Marchi <lucas.demarchi@intel.com>
parent 922ae875

drivers/gpu/drm/xe/display/xe_fb_pin.c

+2 −2
Original line number Diff line number Diff line
@@ -289,7 +289,7 @@ static struct i915_vma *__xe_pin_fb_vma(const struct intel_framebuffer *fb, 
	if (IS_DGFX(to_xe_device(bo->ttm.base.dev)) &&

	    intel_fb_rc_ccs_cc_plane(&fb->base) >= 0 &&

	    !(bo->flags & XE_BO_FLAG_NEEDS_CPU_ACCESS)) {

		struct xe_tile *tile = xe_device_get_root_tile(xe);

		struct xe_vram_region *vram = xe_device_get_root_tile(xe)->mem.vram;



		/*

		 * If we need to able to access the clear-color value stored in
@@ -297,7 +297,7 @@ static struct i915_vma *__xe_pin_fb_vma(const struct intel_framebuffer *fb, 
		 * accessible.  This is important on small-bar systems where

		 * only some subset of VRAM is CPU accessible.

		 */

		if (tile->mem.vram.io_size < tile->mem.vram.usable_size) {

		if (xe_vram_region_io_size(vram) < xe_vram_region_usable_size(vram)) {

			ret = -EINVAL;

			goto err;

		}

drivers/gpu/drm/xe/display/xe_plane_initial.c

+1 −1
Original line number Diff line number Diff line
@@ -103,7 +103,7 @@ initial_plane_bo(struct xe_device *xe, 
		 * We don't currently expect this to ever be placed in the

		 * stolen portion.

		 */

		if (phys_base >= tile0->mem.vram.usable_size) {

		if (phys_base >= xe_vram_region_usable_size(tile0->mem.vram)) {

			drm_err(&xe->drm,

				"Initial plane programming using invalid range, phys_base=%pa\n",

				&phys_base);

drivers/gpu/drm/xe/xe_assert.h

+3 −1
Original line number Diff line number Diff line
@@ -12,6 +12,7 @@ 


#include "xe_gt_types.h"

#include "xe_step.h"

#include "xe_vram.h"



/**

 * DOC: Xe Asserts
@@ -145,7 +146,8 @@ 
	const struct xe_tile *__tile = (tile);							\

	char __buf[10] __maybe_unused;								\

	xe_assert_msg(tile_to_xe(__tile), condition, "tile: %u VRAM %s\n" msg,			\

		      __tile->id, ({ string_get_size(__tile->mem.vram.actual_physical_size, 1,	\

		      __tile->id, ({ string_get_size(						\

				     xe_vram_region_actual_physical_size(__tile->mem.vram), 1,	\

				     STRING_UNITS_2, __buf, sizeof(__buf)); __buf; }), ## arg);	\

})

drivers/gpu/drm/xe/xe_device.c

+19 −0
Original line number Diff line number Diff line
@@ -687,6 +687,21 @@ static void sriov_update_device_info(struct xe_device *xe) 
	}

}



static int xe_device_vram_alloc(struct xe_device *xe)

{

	struct xe_vram_region *vram;



	if (!IS_DGFX(xe))

		return 0;



	vram = drmm_kzalloc(&xe->drm, sizeof(*vram), GFP_KERNEL);

	if (!vram)

		return -ENOMEM;



	xe->mem.vram = vram;

	return 0;

}



/**

 * xe_device_probe_early: Device early probe

 * @xe: xe device instance
@@ -734,6 +749,10 @@ int xe_device_probe_early(struct xe_device *xe) 


	xe->wedged.mode = xe_modparam.wedged_mode;



	err = xe_device_vram_alloc(xe);

	if (err)

		return err;



	return 0;

}

ALLOW_ERROR_INJECTION(xe_device_probe_early, ERRNO); /* See xe_pci_probe() */

drivers/gpu/drm/xe/xe_device_types.h

+4 −2
Original line number Diff line number Diff line
@@ -77,6 +77,8 @@ struct xe_pxp; 
 * device, such as HBM memory or CXL extension memory.

 */

struct xe_vram_region {

	/** @tile: Back pointer to tile */

	struct xe_tile *tile;

	/** @io_start: IO start address of this VRAM instance */

	resource_size_t io_start;

	/**
@@ -216,7 +218,7 @@ struct xe_tile { 
		 * Although VRAM is associated with a specific tile, it can

		 * still be accessed by all tiles' GTs.

		 */

		struct xe_vram_region vram;

		struct xe_vram_region *vram;



		/** @mem.ggtt: Global graphics translation table */

		struct xe_ggtt *ggtt;
@@ -415,7 +417,7 @@ struct xe_device { 
	/** @mem: memory info for device */

	struct {

		/** @mem.vram: VRAM info for device */

		struct xe_vram_region vram;

		struct xe_vram_region *vram;

		/** @mem.sys_mgr: system TTM manager */

		struct ttm_resource_manager sys_mgr;

		/** @mem.sys_mgr: system memory shrinker. */