drm/imagination: Add GPU ID parsing and firmware loading (f99f5f3e) · Commits · git / linux-nf

drivers/gpu/drm/imagination/Makefile

+2 −0

Original line number	Diff line number	Diff line
		@@ -5,6 +5,8 @@ subdir-ccflags-y := -I$(srctree)/$(src)

		powervr-y := \
		pvr_device.o \
		pvr_device_info.o \
		pvr_drv.o \
		pvr_fw.o

		obj-$(CONFIG_DRM_POWERVR) += powervr.o

drivers/gpu/drm/imagination/pvr_device.c

+322 −1

Original line number	Diff line number	Diff line
		@@ -2,19 +2,31 @@
		/* Copyright (c) 2023 Imagination Technologies Ltd. */

		#include "pvr_device.h"
		#include "pvr_device_info.h"

		#include "pvr_fw.h"
		#include "pvr_rogue_cr_defs.h"

		#include <drm/drm_print.h>

		#include <linux/bitfield.h>
		#include <linux/clk.h>
		#include <linux/compiler_attributes.h>
		#include <linux/compiler_types.h>
		#include <linux/dma-mapping.h>
		#include <linux/err.h>
		#include <linux/firmware.h>
		#include <linux/gfp.h>
		#include <linux/interrupt.h>
		#include <linux/platform_device.h>
		#include <linux/pm_runtime.h>
		#include <linux/slab.h>
		#include <linux/stddef.h>
		#include <linux/types.h>
		#include <linux/workqueue.h>

		/* Major number for the supported version of the firmware. */
		#define PVR_FW_VERSION_MAJOR 1

		/**
		* pvr_device_reg_init() - Initialize kernel access to a PowerVR device's
		@@ -100,6 +112,209 @@ static int pvr_device_clk_init(struct pvr_device *pvr_dev)
		return 0;
		}

		/**
		* pvr_build_firmware_filename() - Construct a PowerVR firmware filename
		* @pvr_dev: Target PowerVR device.
		* @base: First part of the filename.
		* @major: Major version number.
		*
		* A PowerVR firmware filename consists of three parts separated by underscores
		* (``'_'``) along with a '.fw' file suffix. The first part is the exact value
		* of @base, the second part is the hardware version string derived from @pvr_fw
		* and the final part is the firmware version number constructed from @major with
		* a 'v' prefix, e.g. powervr/rogue_4.40.2.51_v1.fw.
		*
		* The returned string will have been slab allocated and must be freed with
		* kfree().
		*
		* Return:
		* * The constructed filename on success, or
		* * Any error returned by kasprintf().
		*/
		static char *
		pvr_build_firmware_filename(struct pvr_device pvr_dev, const char base,
		u8 major)
		{
		struct pvr_gpu_id *gpu_id = &pvr_dev->gpu_id;

		return kasprintf(GFP_KERNEL, "%s_%d.%d.%d.%d_v%d.fw", base, gpu_id->b,
		gpu_id->v, gpu_id->n, gpu_id->c, major);
		}

		static void
		pvr_release_firmware(void *data)
		{
		struct pvr_device *pvr_dev = data;

		release_firmware(pvr_dev->fw_dev.firmware);
		}

		/**
		* pvr_request_firmware() - Load firmware for a PowerVR device
		* @pvr_dev: Target PowerVR device.
		*
		* See pvr_build_firmware_filename() for details on firmware file naming.
		*
		* Return:
		* * 0 on success,
		* * Any error returned by pvr_build_firmware_filename(), or
		* * Any error returned by request_firmware().
		*/
		static int
		pvr_request_firmware(struct pvr_device *pvr_dev)
		{
		struct drm_device *drm_dev = &pvr_dev->base;
		char *filename;
		const struct firmware *fw;
		int err;

		filename = pvr_build_firmware_filename(pvr_dev, "powervr/rogue",
		PVR_FW_VERSION_MAJOR);
		if (IS_ERR(filename))
		return PTR_ERR(filename);

		/*
		* This function takes a copy of &filename, meaning we can free our
		* instance before returning.
		*/
		err = request_firmware(&fw, filename, pvr_dev->base.dev);
		if (err) {
		drm_err(drm_dev, "failed to load firmware %s (err=%d)\n",
		filename, err);
		goto err_free_filename;
		}

		drm_info(drm_dev, "loaded firmware %s\n", filename);
		kfree(filename);

		pvr_dev->fw_dev.firmware = fw;

		return devm_add_action_or_reset(drm_dev->dev, pvr_release_firmware, pvr_dev);

		err_free_filename:
		kfree(filename);

		return err;
		}

		/**
		* pvr_load_gpu_id() - Load a PowerVR device's GPU ID (BVNC) from control registers.
		*
		* Sets struct pvr_dev.gpu_id.
		*
		* @pvr_dev: Target PowerVR device.
		*/
		static void
		pvr_load_gpu_id(struct pvr_device *pvr_dev)
		{
		struct pvr_gpu_id *gpu_id = &pvr_dev->gpu_id;
		u64 bvnc;

		/*
		* Try reading the BVNC using the newer (cleaner) method first. If the
		* B value is zero, fall back to the older method.
		*/
		bvnc = pvr_cr_read64(pvr_dev, ROGUE_CR_CORE_ID__PBVNC);

		gpu_id->b = PVR_CR_FIELD_GET(bvnc, CORE_ID__PBVNC__BRANCH_ID);
		if (gpu_id->b != 0) {
		gpu_id->v = PVR_CR_FIELD_GET(bvnc, CORE_ID__PBVNC__VERSION_ID);
		gpu_id->n = PVR_CR_FIELD_GET(bvnc, CORE_ID__PBVNC__NUMBER_OF_SCALABLE_UNITS);
		gpu_id->c = PVR_CR_FIELD_GET(bvnc, CORE_ID__PBVNC__CONFIG_ID);
		} else {
		u32 core_rev = pvr_cr_read32(pvr_dev, ROGUE_CR_CORE_REVISION);
		u32 core_id = pvr_cr_read32(pvr_dev, ROGUE_CR_CORE_ID);
		u16 core_id_config = PVR_CR_FIELD_GET(core_id, CORE_ID_CONFIG);

		gpu_id->b = PVR_CR_FIELD_GET(core_rev, CORE_REVISION_MAJOR);
		gpu_id->v = PVR_CR_FIELD_GET(core_rev, CORE_REVISION_MINOR);
		gpu_id->n = FIELD_GET(0xFF00, core_id_config);
		gpu_id->c = FIELD_GET(0x00FF, core_id_config);
		}
		}

		/**
		* pvr_set_dma_info() - Set PowerVR device DMA information
		* @pvr_dev: Target PowerVR device.
		*
		* Sets the DMA mask and max segment size for the PowerVR device.
		*
		* Return:
		* * 0 on success,
		* * Any error returned by PVR_FEATURE_VALUE(), or
		* * Any error returned by dma_set_mask().
		*/

		static int
		pvr_set_dma_info(struct pvr_device *pvr_dev)
		{
		struct drm_device *drm_dev = from_pvr_device(pvr_dev);
		u16 phys_bus_width;
		int err;

		err = PVR_FEATURE_VALUE(pvr_dev, phys_bus_width, &phys_bus_width);
		if (err) {
		drm_err(drm_dev, "Failed to get device physical bus width\n");
		return err;
		}

		err = dma_set_mask(drm_dev->dev, DMA_BIT_MASK(phys_bus_width));
		if (err) {
		drm_err(drm_dev, "Failed to set DMA mask (err=%d)\n", err);
		return err;
		}

		dma_set_max_seg_size(drm_dev->dev, UINT_MAX);

		return 0;
		}

		/**
		* pvr_device_gpu_init() - GPU-specific initialization for a PowerVR device
		* @pvr_dev: Target PowerVR device.
		*
		* The following steps are taken to ensure the device is ready:
		*
		* 1. Read the hardware version information from control registers,
		* 2. Initialise the hardware feature information,
		* 3. Setup the device DMA information,
		* 4. Setup the device-scoped memory context, and
		* 5. Load firmware into the device.
		*
		* Return:
		* * 0 on success,
		* * -%ENODEV if the GPU is not supported,
		* * Any error returned by pvr_set_dma_info(),
		* * Any error returned by pvr_memory_context_init(), or
		* * Any error returned by pvr_request_firmware().
		*/
		static int
		pvr_device_gpu_init(struct pvr_device *pvr_dev)
		{
		int err;

		pvr_load_gpu_id(pvr_dev);

		err = pvr_request_firmware(pvr_dev);
		if (err)
		return err;

		err = pvr_fw_validate_init_device_info(pvr_dev);
		if (err)
		return err;

		if (PVR_HAS_FEATURE(pvr_dev, meta))
		pvr_dev->fw_dev.processor_type = PVR_FW_PROCESSOR_TYPE_META;
		else if (PVR_HAS_FEATURE(pvr_dev, mips))
		pvr_dev->fw_dev.processor_type = PVR_FW_PROCESSOR_TYPE_MIPS;
		else if (PVR_HAS_FEATURE(pvr_dev, riscv_fw_processor))
		pvr_dev->fw_dev.processor_type = PVR_FW_PROCESSOR_TYPE_RISCV;
		else
		return -EINVAL;

		return pvr_set_dma_info(pvr_dev);
		}

		/**
		* pvr_device_init() - Initialize a PowerVR device
		* @pvr_dev: Target PowerVR device.
		@@ -130,7 +345,12 @@ pvr_device_init(struct pvr_device *pvr_dev)
		return err;

		/* Map the control registers into memory. */
		return pvr_device_reg_init(pvr_dev);
		err = pvr_device_reg_init(pvr_dev);
		if (err)
		return err;

		/* Perform GPU-specific initialization steps. */
		return pvr_device_gpu_init(pvr_dev);
		}

		/**
		@@ -145,3 +365,104 @@ pvr_device_fini(struct pvr_device *pvr_dev)
		* the initialization stages in pvr_device_init().
		*/
		}

		bool
		pvr_device_has_uapi_quirk(struct pvr_device *pvr_dev, u32 quirk)
		{
		switch (quirk) {
		case 47217:
		return PVR_HAS_QUIRK(pvr_dev, 47217);
		case 48545:
		return PVR_HAS_QUIRK(pvr_dev, 48545);
		case 49927:
		return PVR_HAS_QUIRK(pvr_dev, 49927);
		case 51764:
		return PVR_HAS_QUIRK(pvr_dev, 51764);
		case 62269:
		return PVR_HAS_QUIRK(pvr_dev, 62269);
		default:
		return false;
		};
		}

		bool
		pvr_device_has_uapi_enhancement(struct pvr_device *pvr_dev, u32 enhancement)
		{
		switch (enhancement) {
		case 35421:
		return PVR_HAS_ENHANCEMENT(pvr_dev, 35421);
		case 42064:
		return PVR_HAS_ENHANCEMENT(pvr_dev, 42064);
		default:
		return false;
		};
		}

		/**
		* pvr_device_has_feature() - Look up device feature based on feature definition
		* @pvr_dev: Device pointer.
		* @feature: Feature to look up. Should be one of %PVR_FEATURE_*.
		*
		* Returns:
		* * %true if feature is present on device, or
		* * %false if feature is not present on device.
		*/
		bool
		pvr_device_has_feature(struct pvr_device *pvr_dev, u32 feature)
		{
		switch (feature) {
		case PVR_FEATURE_CLUSTER_GROUPING:
		return PVR_HAS_FEATURE(pvr_dev, cluster_grouping);

		case PVR_FEATURE_COMPUTE_MORTON_CAPABLE:
		return PVR_HAS_FEATURE(pvr_dev, compute_morton_capable);

		case PVR_FEATURE_FB_CDC_V4:
		return PVR_HAS_FEATURE(pvr_dev, fb_cdc_v4);

		case PVR_FEATURE_GPU_MULTICORE_SUPPORT:
		return PVR_HAS_FEATURE(pvr_dev, gpu_multicore_support);

		case PVR_FEATURE_ISP_ZLS_D24_S8_PACKING_OGL_MODE:
		return PVR_HAS_FEATURE(pvr_dev, isp_zls_d24_s8_packing_ogl_mode);

		case PVR_FEATURE_S7_TOP_INFRASTRUCTURE:
		return PVR_HAS_FEATURE(pvr_dev, s7_top_infrastructure);

		case PVR_FEATURE_TESSELLATION:
		return PVR_HAS_FEATURE(pvr_dev, tessellation);

		case PVR_FEATURE_TPU_DM_GLOBAL_REGISTERS:
		return PVR_HAS_FEATURE(pvr_dev, tpu_dm_global_registers);

		case PVR_FEATURE_VDM_DRAWINDIRECT:
		return PVR_HAS_FEATURE(pvr_dev, vdm_drawindirect);

		case PVR_FEATURE_VDM_OBJECT_LEVEL_LLS:
		return PVR_HAS_FEATURE(pvr_dev, vdm_object_level_lls);

		case PVR_FEATURE_ZLS_SUBTILE:
		return PVR_HAS_FEATURE(pvr_dev, zls_subtile);

		/* Derived features. */
		case PVR_FEATURE_CDM_USER_MODE_QUEUE: {
		u8 cdm_control_stream_format = 0;

		PVR_FEATURE_VALUE(pvr_dev, cdm_control_stream_format, &cdm_control_stream_format);
		return (cdm_control_stream_format >= 2 && cdm_control_stream_format <= 4);
		}

		case PVR_FEATURE_REQUIRES_FB_CDC_ZLS_SETUP:
		if (PVR_HAS_FEATURE(pvr_dev, fbcdc_algorithm)) {
		u8 fbcdc_algorithm = 0;

		PVR_FEATURE_VALUE(pvr_dev, fbcdc_algorithm, &fbcdc_algorithm);
		return (fbcdc_algorithm < 3 \|\| PVR_HAS_FEATURE(pvr_dev, fb_cdc_v4));
		}
		return false;

		default:
		WARN(true, "Looking up undefined feature %u\n", feature);
		return false;
		}
		}

drivers/gpu/drm/imagination/pvr_device.h

+220 −0

Original line number	Diff line number	Diff line
		@@ -4,6 +4,9 @@
		#ifndef PVR_DEVICE_H
		#define PVR_DEVICE_H

		#include "pvr_device_info.h"
		#include "pvr_fw.h"

		#include <drm/drm_device.h>
		#include <drm/drm_file.h>
		#include <drm/drm_mm.h>
		@@ -28,6 +31,26 @@ struct clk;
		/* Forward declaration from <linux/firmware.h>. */
		struct firmware;

		/**
		* struct pvr_gpu_id - Hardware GPU ID information for a PowerVR device
		* @b: Branch ID.
		* @v: Version ID.
		* @n: Number of scalable units.
		* @c: Config ID.
		*/
		struct pvr_gpu_id {
		u16 b, v, n, c;
		};

		/**
		* struct pvr_fw_version - Firmware version information
		* @major: Major version number.
		* @minor: Minor version number.
		*/
		struct pvr_fw_version {
		u16 major, minor;
		};

		/**
		* struct pvr_device - powervr-specific wrapper for &struct drm_device
		*/
		@@ -40,6 +63,35 @@ struct pvr_device {
		*/
		struct drm_device base;

		/** @gpu_id: GPU ID detected at runtime. */
		struct pvr_gpu_id gpu_id;

		/**
		* @features: Hardware feature information.
		*
		* Do not access this member directly, instead use PVR_HAS_FEATURE()
		* or PVR_FEATURE_VALUE() macros.
		*/
		struct pvr_device_features features;

		/**
		* @quirks: Hardware quirk information.
		*
		* Do not access this member directly, instead use PVR_HAS_QUIRK().
		*/
		struct pvr_device_quirks quirks;

		/**
		* @enhancements: Hardware enhancement information.
		*
		* Do not access this member directly, instead use
		* PVR_HAS_ENHANCEMENT().
		*/
		struct pvr_device_enhancements enhancements;

		/** @fw_version: Firmware version detected at runtime. */
		struct pvr_fw_version fw_version;

		/**
		* @regs: Device control registers.
		*
		@@ -70,6 +122,9 @@ struct pvr_device {
		* Interface (MEMIF). If present, this needs to be enabled/disabled together with @core_clk.
		*/
		struct clk *mem_clk;

		/** @fw_dev: Firmware related data. */
		struct pvr_fw_device fw_dev;
		};

		/**
		@@ -92,6 +147,76 @@ struct pvr_file {
		struct pvr_device *pvr_dev;
		};

		/**
		* PVR_HAS_FEATURE() - Tests whether a PowerVR device has a given feature
		* @pvr_dev: [IN] Target PowerVR device.
		* @feature: [IN] Hardware feature name.
		*
		* Feature names are derived from those found in &struct pvr_device_features by
		* dropping the 'has_' prefix, which is applied by this macro.
		*
		* Return:
		* * true if the named feature is present in the hardware
		* * false if the named feature is not present in the hardware
		*/
		#define PVR_HAS_FEATURE(pvr_dev, feature) ((pvr_dev)->features.has_##feature)

		/**
		* PVR_FEATURE_VALUE() - Gets a PowerVR device feature value
		* @pvr_dev: [IN] Target PowerVR device.
		* @feature: [IN] Feature name.
		* @value_out: [OUT] Feature value.
		*
		* This macro will get a feature value for those features that have values.
		* If the feature is not present, nothing will be stored to @value_out.
		*
		* Feature names are derived from those found in &struct pvr_device_features by
		* dropping the 'has_' prefix.
		*
		* Return:
		* * 0 on success, or
		* * -%EINVAL if the named feature is not present in the hardware
		*/
		#define PVR_FEATURE_VALUE(pvr_dev, feature, value_out) \
		({ \
		struct pvr_device *_pvr_dev = pvr_dev; \
		int _ret = -EINVAL; \
		if (_pvr_dev->features.has_##feature) { \
		*(value_out) = _pvr_dev->features.feature; \
		_ret = 0; \
		} \
		_ret; \
		})

		/**
		* PVR_HAS_QUIRK() - Tests whether a physical device has a given quirk
		* @pvr_dev: [IN] Target PowerVR device.
		* @quirk: [IN] Hardware quirk name.
		*
		* Quirk numbers are derived from those found in #pvr_device_quirks by
		* dropping the 'has_brn' prefix, which is applied by this macro.
		*
		* Returns
		* * true if the quirk is present in the hardware, or
		* * false if the quirk is not present in the hardware.
		*/
		#define PVR_HAS_QUIRK(pvr_dev, quirk) ((pvr_dev)->quirks.has_brn##quirk)

		/**
		* PVR_HAS_ENHANCEMENT() - Tests whether a physical device has a given
		* enhancement
		* @pvr_dev: [IN] Target PowerVR device.
		* @enhancement: [IN] Hardware enhancement name.
		*
		* Enhancement numbers are derived from those found in #pvr_device_enhancements
		* by dropping the 'has_ern' prefix, which is applied by this macro.
		*
		* Returns
		* * true if the enhancement is present in the hardware, or
		* * false if the enhancement is not present in the hardware.
		*/
		#define PVR_HAS_ENHANCEMENT(pvr_dev, enhancement) ((pvr_dev)->enhancements.has_ern##enhancement)

		#define from_pvr_device(pvr_dev) (&(pvr_dev)->base)

		#define to_pvr_device(drm_dev) container_of_const(drm_dev, struct pvr_device, base)
		@@ -100,9 +225,77 @@ struct pvr_file {

		#define to_pvr_file(file) ((file)->driver_priv)

		/**
		* PVR_PACKED_BVNC() - Packs B, V, N and C values into a 64-bit unsigned integer
		* @b: Branch ID.
		* @v: Version ID.
		* @n: Number of scalable units.
		* @c: Config ID.
		*
		* The packed layout is as follows:
		*
		* +--------+--------+--------+-------+
		* \| 63..48 \| 47..32 \| 31..16 \| 15..0 \|
		* +========+========+========+=======+
		* \| B \| V \| N \| C \|
		* +--------+--------+--------+-------+
		*
		* pvr_gpu_id_to_packed_bvnc() should be used instead of this macro when a
		* &struct pvr_gpu_id is available in order to ensure proper type checking.
		*
		* Return: Packed BVNC.
		*/
		/* clang-format off */
		#define PVR_PACKED_BVNC(b, v, n, c) \
		((((u64)(b) & GENMASK_ULL(15, 0)) << 48) \| \
		(((u64)(v) & GENMASK_ULL(15, 0)) << 32) \| \
		(((u64)(n) & GENMASK_ULL(15, 0)) << 16) \| \
		(((u64)(c) & GENMASK_ULL(15, 0)) << 0))
		/* clang-format on */

		/**
		* pvr_gpu_id_to_packed_bvnc() - Packs B, V, N and C values into a 64-bit
		* unsigned integer
		* @gpu_id: GPU ID.
		*
		* The packed layout is as follows:
		*
		* +--------+--------+--------+-------+
		* \| 63..48 \| 47..32 \| 31..16 \| 15..0 \|
		* +========+========+========+=======+
		* \| B \| V \| N \| C \|
		* +--------+--------+--------+-------+
		*
		* This should be used in preference to PVR_PACKED_BVNC() when a &struct
		* pvr_gpu_id is available in order to ensure proper type checking.
		*
		* Return: Packed BVNC.
		*/
		static __always_inline u64
		pvr_gpu_id_to_packed_bvnc(struct pvr_gpu_id *gpu_id)
		{
		return PVR_PACKED_BVNC(gpu_id->b, gpu_id->v, gpu_id->n, gpu_id->c);
		}

		static __always_inline void
		packed_bvnc_to_pvr_gpu_id(u64 bvnc, struct pvr_gpu_id *gpu_id)
		{
		gpu_id->b = (bvnc & GENMASK_ULL(63, 48)) >> 48;
		gpu_id->v = (bvnc & GENMASK_ULL(47, 32)) >> 32;
		gpu_id->n = (bvnc & GENMASK_ULL(31, 16)) >> 16;
		gpu_id->c = bvnc & GENMASK_ULL(15, 0);
		}

		int pvr_device_init(struct pvr_device *pvr_dev);
		void pvr_device_fini(struct pvr_device *pvr_dev);

		bool
		pvr_device_has_uapi_quirk(struct pvr_device *pvr_dev, u32 quirk);
		bool
		pvr_device_has_uapi_enhancement(struct pvr_device *pvr_dev, u32 enhancement);
		bool
		pvr_device_has_feature(struct pvr_device *pvr_dev, u32 feature);

		/**
		* PVR_CR_FIELD_GET() - Extract a single field from a PowerVR control register
		* @val: Value of the target register.
		@@ -208,6 +401,29 @@ pvr_cr_poll_reg64(struct pvr_device *pvr_dev, u32 reg_addr, u64 reg_value,
		(value & reg_mask) == reg_value, 0, timeout_usec);
		}

		/**
		* pvr_round_up_to_cacheline_size() - Round up a provided size to be cacheline
		* aligned
		* @pvr_dev: Target PowerVR device.
		* @size: Initial size, in bytes.
		*
		* Returns:
		* * Size aligned to cacheline size.
		*/
		static __always_inline size_t
		pvr_round_up_to_cacheline_size(struct pvr_device *pvr_dev, size_t size)
		{
		u16 slc_cacheline_size_bits = 0;
		u16 slc_cacheline_size_bytes;

		WARN_ON(!PVR_HAS_FEATURE(pvr_dev, slc_cache_line_size_bits));
		PVR_FEATURE_VALUE(pvr_dev, slc_cache_line_size_bits,
		&slc_cacheline_size_bits);
		slc_cacheline_size_bytes = slc_cacheline_size_bits / 8;

		return round_up(size, slc_cacheline_size_bytes);
		}

		/**
		* DOC: IOCTL validation helpers
		*
		@@ -302,4 +518,8 @@ pvr_ioctl_union_padding_check(void *instance, size_t union_offset,
		__union_size, __member_size); \
		})

		#define PVR_FW_PROCESSOR_TYPE_META 0
		#define PVR_FW_PROCESSOR_TYPE_MIPS 1
		#define PVR_FW_PROCESSOR_TYPE_RISCV 2

		#endif /* PVR_DEVICE_H */

drivers/gpu/drm/imagination/pvr_device_info.c

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drivers/gpu/drm/imagination/pvr_device_info.h

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		/* SPDX-License-Identifier: GPL-2.0-only OR MIT */
		/* Copyright (c) 2023 Imagination Technologies Ltd. */

		#ifndef PVR_DEVICE_INFO_H
		#define PVR_DEVICE_INFO_H

		#include <linux/types.h>

		struct pvr_device;

		/*
		* struct pvr_device_features - Hardware feature information
		*/
		struct pvr_device_features {
		bool has_axi_acelite;
		bool has_cdm_control_stream_format;
		bool has_cluster_grouping;
		bool has_common_store_size_in_dwords;
		bool has_compute;
		bool has_compute_morton_capable;
		bool has_compute_overlap;
		bool has_coreid_per_os;
		bool has_dynamic_dust_power;
		bool has_ecc_rams;
		bool has_fb_cdc_v4;
		bool has_fbc_max_default_descriptors;
		bool has_fbc_max_large_descriptors;
		bool has_fbcdc;
		bool has_fbcdc_algorithm;
		bool has_fbcdc_architecture;
		bool has_gpu_multicore_support;
		bool has_gpu_virtualisation;
		bool has_gs_rta_support;
		bool has_irq_per_os;
		bool has_isp_max_tiles_in_flight;
		bool has_isp_samples_per_pixel;
		bool has_isp_zls_d24_s8_packing_ogl_mode;
		bool has_layout_mars;
		bool has_max_partitions;
		bool has_meta;
		bool has_meta_coremem_size;
		bool has_mips;
		bool has_num_clusters;
		bool has_num_isp_ipp_pipes;
		bool has_num_osids;
		bool has_num_raster_pipes;
		bool has_pbe2_in_xe;
		bool has_pbvnc_coreid_reg;
		bool has_perfbus;
		bool has_perf_counter_batch;
		bool has_phys_bus_width;
		bool has_riscv_fw_processor;
		bool has_roguexe;
		bool has_s7_top_infrastructure;
		bool has_simple_internal_parameter_format;
		bool has_simple_internal_parameter_format_v2;
		bool has_simple_parameter_format_version;
		bool has_slc_banks;
		bool has_slc_cache_line_size_bits;
		bool has_slc_size_configurable;
		bool has_slc_size_in_kilobytes;
		bool has_soc_timer;
		bool has_sys_bus_secure_reset;
		bool has_tessellation;
		bool has_tile_region_protection;
		bool has_tile_size_x;
		bool has_tile_size_y;
		bool has_tla;
		bool has_tpu_cem_datamaster_global_registers;
		bool has_tpu_dm_global_registers;
		bool has_tpu_filtering_mode_control;
		bool has_usc_min_output_registers_per_pix;
		bool has_vdm_drawindirect;
		bool has_vdm_object_level_lls;
		bool has_virtual_address_space_bits;
		bool has_watchdog_timer;
		bool has_workgroup_protection;
		bool has_xe_architecture;
		bool has_xe_memory_hierarchy;
		bool has_xe_tpu2;
		bool has_xpu_max_regbanks_addr_width;
		bool has_xpu_max_slaves;
		bool has_xpu_register_broadcast;
		bool has_xt_top_infrastructure;
		bool has_zls_subtile;

		u64 cdm_control_stream_format;
		u64 common_store_size_in_dwords;
		u64 ecc_rams;
		u64 fbc_max_default_descriptors;
		u64 fbc_max_large_descriptors;
		u64 fbcdc;
		u64 fbcdc_algorithm;
		u64 fbcdc_architecture;
		u64 isp_max_tiles_in_flight;
		u64 isp_samples_per_pixel;
		u64 layout_mars;
		u64 max_partitions;
		u64 meta;
		u64 meta_coremem_size;
		u64 num_clusters;
		u64 num_isp_ipp_pipes;
		u64 num_osids;
		u64 num_raster_pipes;
		u64 phys_bus_width;
		u64 simple_parameter_format_version;
		u64 slc_banks;
		u64 slc_cache_line_size_bits;
		u64 slc_size_in_kilobytes;
		u64 tile_size_x;
		u64 tile_size_y;
		u64 usc_min_output_registers_per_pix;
		u64 virtual_address_space_bits;
		u64 xe_architecture;
		u64 xpu_max_regbanks_addr_width;
		u64 xpu_max_slaves;
		u64 xpu_register_broadcast;
		};

		/*
		* struct pvr_device_quirks - Hardware quirk information
		*/
		struct pvr_device_quirks {
		bool has_brn44079;
		bool has_brn47217;
		bool has_brn48492;
		bool has_brn48545;
		bool has_brn49927;
		bool has_brn50767;
		bool has_brn51764;
		bool has_brn62269;
		bool has_brn63142;
		bool has_brn63553;
		bool has_brn66011;
		bool has_brn71242;
		};

		/*
		* struct pvr_device_enhancements - Hardware enhancement information
		*/
		struct pvr_device_enhancements {
		bool has_ern35421;
		bool has_ern38020;
		bool has_ern38748;
		bool has_ern42064;
		bool has_ern42290;
		bool has_ern42606;
		bool has_ern47025;
		bool has_ern57596;
		};

		void pvr_device_info_set_quirks(struct pvr_device pvr_dev, const u64 bitmask,
		u32 bitmask_len);
		void pvr_device_info_set_enhancements(struct pvr_device pvr_dev, const u64 bitmask,
		u32 bitmask_len);
		int pvr_device_info_set_features(struct pvr_device pvr_dev, const u64 features, u32 features_size,
		u32 feature_param_size);

		/*
		* Meta cores
		*
		* These are the values for the 'meta' feature when the feature is present
		* (as per &struct pvr_device_features)/
		*/
		#define PVR_META_MTP218 (1)
		#define PVR_META_MTP219 (2)
		#define PVR_META_LTP218 (3)
		#define PVR_META_LTP217 (4)

		enum {
		PVR_FEATURE_CDM_USER_MODE_QUEUE,
		PVR_FEATURE_CLUSTER_GROUPING,
		PVR_FEATURE_COMPUTE_MORTON_CAPABLE,
		PVR_FEATURE_FB_CDC_V4,
		PVR_FEATURE_GPU_MULTICORE_SUPPORT,
		PVR_FEATURE_ISP_ZLS_D24_S8_PACKING_OGL_MODE,
		PVR_FEATURE_REQUIRES_FB_CDC_ZLS_SETUP,
		PVR_FEATURE_S7_TOP_INFRASTRUCTURE,
		PVR_FEATURE_TESSELLATION,
		PVR_FEATURE_TPU_DM_GLOBAL_REGISTERS,
		PVR_FEATURE_VDM_DRAWINDIRECT,
		PVR_FEATURE_VDM_OBJECT_LEVEL_LLS,
		PVR_FEATURE_ZLS_SUBTILE,
		};

		#endif /* PVR_DEVICE_INFO_H */