Commit fb51970b authored by Anusha Srivatsa's avatar Anusha Srivatsa Committed by Lucas De Marchi
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drm/i915/adl_s: Add PCH support 



Add support for Alderpoint(ADP) PCH used with Alderlake-S.

v2:
- Use drm_dbg_kms and drm_WARN_ON based on Jani's feedback.(aswarup)

Cc: Matt Roper <matthew.d.roper@intel.com>
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Cc: Caz Yokoyama <caz.yokoyama@intel.com>
Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Imre Deak <imre.deak@intel.com>
Signed-off-by: default avatarAnusha Srivatsa <anusha.srivatsa@intel.com>
Signed-off-by: default avatarAditya Swarup <aditya.swarup@intel.com>
Reviewed-by: default avatarMatt Roper <matthew.d.roper@intel.com>
Reviewed-by: default avatarLucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: default avatarLucas De Marchi <lucas.demarchi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210125140753.347998-3-aditya.swarup@intel.com
parent c6bba9e5

drivers/gpu/drm/i915/intel_pch.c

+7 −1
Original line number Diff line number Diff line
@@ -128,6 +128,10 @@ intel_pch_type(const struct drm_i915_private *dev_priv, unsigned short id) 
		drm_dbg_kms(&dev_priv->drm, "Found Jasper Lake PCH\n");

		drm_WARN_ON(&dev_priv->drm, !IS_JSL_EHL(dev_priv));

		return PCH_JSP;

	case INTEL_PCH_ADP_DEVICE_ID_TYPE:

		drm_dbg_kms(&dev_priv->drm, "Found Alder Lake PCH\n");

		drm_WARN_ON(&dev_priv->drm, !IS_ALDERLAKE_S(dev_priv));

		return PCH_ADP;

	default:

		return PCH_NONE;

	}
@@ -155,7 +159,9 @@ intel_virt_detect_pch(const struct drm_i915_private *dev_priv) 
	 * make an educated guess as to which PCH is really there.

	 */



	if (IS_TIGERLAKE(dev_priv) || IS_ROCKETLAKE(dev_priv))

	if (IS_ALDERLAKE_S(dev_priv))

		id = INTEL_PCH_ADP_DEVICE_ID_TYPE;

	else if (IS_TIGERLAKE(dev_priv) || IS_ROCKETLAKE(dev_priv))

		id = INTEL_PCH_TGP_DEVICE_ID_TYPE;

	else if (IS_JSL_EHL(dev_priv))

		id = INTEL_PCH_MCC_DEVICE_ID_TYPE;

drivers/gpu/drm/i915/intel_pch.h

+3 −0
Original line number Diff line number Diff line
@@ -26,6 +26,7 @@ enum intel_pch { 
	PCH_JSP,	/* Jasper Lake PCH */

	PCH_MCC,        /* Mule Creek Canyon PCH */

	PCH_TGP,	/* Tiger Lake PCH */

	PCH_ADP,	/* Alder Lake PCH */



	/* Fake PCHs, functionality handled on the same PCI dev */

	PCH_DG1 = 1024,
@@ -53,12 +54,14 @@ enum intel_pch { 
#define INTEL_PCH_TGP2_DEVICE_ID_TYPE		0x4380

#define INTEL_PCH_JSP_DEVICE_ID_TYPE		0x4D80

#define INTEL_PCH_JSP2_DEVICE_ID_TYPE		0x3880

#define INTEL_PCH_ADP_DEVICE_ID_TYPE		0x7A80

#define INTEL_PCH_P2X_DEVICE_ID_TYPE		0x7100

#define INTEL_PCH_P3X_DEVICE_ID_TYPE		0x7000

#define INTEL_PCH_QEMU_DEVICE_ID_TYPE		0x2900 /* qemu q35 has 2918 */



#define INTEL_PCH_TYPE(dev_priv)		((dev_priv)->pch_type)

#define INTEL_PCH_ID(dev_priv)			((dev_priv)->pch_id)

#define HAS_PCH_ADP(dev_priv)			(INTEL_PCH_TYPE(dev_priv) == PCH_ADP)

#define HAS_PCH_DG1(dev_priv)			(INTEL_PCH_TYPE(dev_priv) == PCH_DG1)

#define HAS_PCH_JSP(dev_priv)			(INTEL_PCH_TYPE(dev_priv) == PCH_JSP)

#define HAS_PCH_MCC(dev_priv)			(INTEL_PCH_TYPE(dev_priv) == PCH_MCC)