Commit fc143580 authored by Kajol Jain's avatar Kajol Jain Committed by Arnaldo Carvalho de Melo
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perf vendor events power10: Update JSON/events 



Update JSON/Events list with data-source events for power10 platform.

Signed-off-by: default avatarKajol Jain <kjain@linux.ibm.com>
Cc: Athira Rajeev <atrajeev@linux.vnet.ibm.com>
Cc: Disha Goel <disgoel@linux.ibm.com>
Cc: Madhavan Srinivasan <maddy@linux.ibm.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: linuxppc-dev@lists.ozlabs.org
Link: https://lore.kernel.org/r/20230905114039.176645-1-kjain@linux.ibm.com


Signed-off-by: default avatarArnaldo Carvalho de Melo <acme@redhat.com>
parent 6066622c

tools/perf/pmu-events/arch/powerpc/power10/datasource.json

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+1282 −0

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tools/perf/pmu-events/arch/powerpc/power10/others.json

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Original line number Diff line number Diff line
@@ -89,11 +89,6 @@ 
    "EventName": "PM_LD_DEMAND_MISS_L1",

    "BriefDescription": "The L1 cache was reloaded with a line that fulfills a demand miss request. Counted at reload time, before finish."

  },

  {

    "EventCode": "0x300FE",

    "EventName": "PM_DATA_FROM_L3MISS",

    "BriefDescription": "The processor's data cache was reloaded from a source other than the local core's L1, L2, or L3 due to a demand miss."

  },

  {

    "EventCode": "0x40012",

    "EventName": "PM_L1_ICACHE_RELOADED_ALL",
@@ -113,10 +108,5 @@ 
    "EventCode": "0x400F0",

    "EventName": "PM_LD_DEMAND_MISS_L1_FIN",

    "BriefDescription": "Load missed L1, counted at finish time."

  },

  {

    "EventCode": "0x400FE",

    "EventName": "PM_DATA_FROM_MEMORY",

    "BriefDescription": "The processor's data cache was reloaded from local, remote, or distant memory due to a demand miss."

  }

]

tools/perf/pmu-events/arch/powerpc/power10/translation.json

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Original line number Diff line number Diff line
@@ -9,11 +9,6 @@ 
    "EventName": "PM_ST_CMPL",

    "BriefDescription": "Stores completed from S2Q (2nd-level store queue). This event includes regular stores, stcx and cache inhibited stores. The following operations are excluded (pteupdate, snoop tlbie complete, store atomics, miso, load atomic payloads, tlbie, tlbsync, slbieg, isync, msgsnd, slbiag, cpabort, copy, tcheck, tend, stsync, dcbst, icbi, dcbf, hwsync, lwsync, ptesync, eieio, msgsync)."

  },

  {

    "EventCode": "0x200FE",

    "EventName": "PM_DATA_FROM_L2MISS",

    "BriefDescription": "The processor's L1 data cache was reloaded from a source beyond the local core's L2 due to a demand miss."

  },

  {

    "EventCode": "0x300F0",

    "EventName": "PM_ST_MISS_L1",