Commit fc17de99 authored Feb 22, 2025 by Isaku Yamahata Committed by Paolo Bonzini Mar 14, 2025

KVM: TDX: Wait lapic expire when timer IRQ was injected



Call kvm_wait_lapic_expire() when POSTED_INTR_ON is set and the vector
for LVTT is set in PIR before TD entry.

KVM always assumes a timer IRQ was injected if APIC state is protected.
For TDX guest, APIC state is protected and KVM injects timer IRQ via posted
interrupt.  To avoid unnecessary wait calls, only call
kvm_wait_lapic_expire() when a timer IRQ was injected, i.e., POSTED_INTR_ON
is set and the vector for LVTT is set in PIR.

Add a helper to test PIR.

Signed-off-by: Isaku Yamahata <isaku.yamahata@intel.com>
Co-developed-by: Binbin Wu <binbin.wu@linux.intel.com>
Signed-off-by: Binbin Wu <binbin.wu@linux.intel.com>
Message-ID: <20250222014757.897978-7-binbin.wu@linux.intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

parent 14aecf2a

arch/x86/include/asm/posted_intr.h

+5 −0

Original line number	Diff line number	Diff line
		@@ -81,6 +81,11 @@ static inline bool pi_test_sn(struct pi_desc *pi_desc)
		return test_bit(POSTED_INTR_SN, (unsigned long *)&pi_desc->control);
		}

		static inline bool pi_test_pir(int vector, struct pi_desc *pi_desc)
		{
		return test_bit(vector, (unsigned long *)pi_desc->pir);
		}

		/* Non-atomic helpers */
		static inline void __pi_set_sn(struct pi_desc *pi_desc)
		{

arch/x86/kvm/vmx/tdx.c

+6 −1

Original line number	Diff line number	Diff line
		@@ -969,9 +969,14 @@ fastpath_t tdx_vcpu_run(struct kvm_vcpu *vcpu, bool force_immediate_exit)

		trace_kvm_entry(vcpu, force_immediate_exit);

		if (pi_test_on(&vt->pi_desc))
		if (pi_test_on(&vt->pi_desc)) {
		apic->send_IPI_self(POSTED_INTR_VECTOR);

		if (pi_test_pir(kvm_lapic_get_reg(vcpu->arch.apic, APIC_LVTT) &
		APIC_VECTOR_MASK, &vt->pi_desc))
		kvm_wait_lapic_expire(vcpu);
		}

		tdx_vcpu_enter_exit(vcpu);

		if (vt->host_debugctlmsr & ~TDX_DEBUGCTL_PRESERVED)