Commit fc916719 authored by Hariprasad Kelam's avatar Hariprasad Kelam Committed by Jakub Kicinski
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Octeontx2-af: RPM: Register driver with PCI subsys IDs 



Although the PCI device ID and Vendor ID for the RPM (MAC) block
have remained the same across Octeon CN10K and the next-generation
CN20K silicon, Hardware architecture has changed (NIX mapped RPMs
and RFOE Mapped RPMs).

Add PCI Subsystem IDs to the device table to ensure that this driver
can be probed from NIX mapped RPM devices only.

Signed-off-by: default avatarHariprasad Kelam <hkelam@marvell.com>
Link: https://patch.msgid.link/20250224035603.1220913-1-hkelam@marvell.com


Signed-off-by: default avatarJakub Kicinski <kuba@kernel.org>
parent 287044ab

drivers/net/ethernet/marvell/octeontx2/af/cgx.c

+12 −2
Original line number Diff line number Diff line
@@ -66,8 +66,18 @@ static int cgx_fwi_link_change(struct cgx *cgx, int lmac_id, bool en); 
/* Supported devices */

static const struct pci_device_id cgx_id_table[] = {

	{ PCI_DEVICE(PCI_VENDOR_ID_CAVIUM, PCI_DEVID_OCTEONTX2_CGX) },

	{ PCI_DEVICE(PCI_VENDOR_ID_CAVIUM, PCI_DEVID_CN10K_RPM) },

	{ PCI_DEVICE(PCI_VENDOR_ID_CAVIUM, PCI_DEVID_CN10KB_RPM) },

	{ PCI_DEVICE_SUB(PCI_VENDOR_ID_CAVIUM, PCI_DEVID_CN10K_RPM,

	  PCI_ANY_ID, PCI_SUBSYS_DEVID_CN10K_A) },

	{ PCI_DEVICE_SUB(PCI_VENDOR_ID_CAVIUM, PCI_DEVID_CN10K_RPM,

	  PCI_ANY_ID, PCI_SUBSYS_DEVID_CNF10K_A) },

	{ PCI_DEVICE_SUB(PCI_VENDOR_ID_CAVIUM, PCI_DEVID_CN10K_RPM,

	  PCI_ANY_ID, PCI_SUBSYS_DEVID_CNF10K_B) },

	{ PCI_DEVICE_SUB(PCI_VENDOR_ID_CAVIUM, PCI_DEVID_CN10KB_RPM,

	  PCI_ANY_ID, PCI_SUBSYS_DEVID_CN10K_B) },

	{ PCI_DEVICE_SUB(PCI_VENDOR_ID_CAVIUM, PCI_DEVID_CN10KB_RPM,

	  PCI_ANY_ID, PCI_SUBSYS_DEVID_CN20KA) },

	{ PCI_DEVICE_SUB(PCI_VENDOR_ID_CAVIUM, PCI_DEVID_CN10KB_RPM,

	  PCI_ANY_ID, PCI_SUBSYS_DEVID_CNF20KA) },

	{ 0, }  /* end of table */

};

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

+2 −0
Original line number Diff line number Diff line
@@ -30,6 +30,8 @@ 
#define PCI_SUBSYS_DEVID_CNF10K_A	       0xBA00

#define PCI_SUBSYS_DEVID_CNF10K_B              0xBC00

#define PCI_SUBSYS_DEVID_CN10K_B               0xBD00

#define PCI_SUBSYS_DEVID_CN20KA                0xC220

#define PCI_SUBSYS_DEVID_CNF20KA               0xC320



/* PCI BAR nos */

#define	PCI_AF_REG_BAR_NUM			0