Commit fcec00d7 authored by Rob Herring (Arm)'s avatar Rob Herring (Arm)
Browse files

dt-bindings: interrupt-controller: Convert qca,ar7100-misc-intc to DT schema 

Convert the Qualcomm Atheros ath79 Misc interrupt controller binding to
schema format.

Adjust the compatible values to match what's actually in use.

Link: https://lore.kernel.org/r/20250505144821.1292151-1-robh@kernel.org


Signed-off-by: default avatarRob Herring (Arm) <robh@kernel.org>
parent f3ce2e12

Documentation/devicetree/bindings/interrupt-controller/qca,ar7100-misc-intc.yaml

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/interrupt-controller/qca,ar7100-misc-intc.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Qualcomm Atheros AR7xxx/AR9XXX MISC interrupt controller



maintainers:

  - Alban Bedel <albeu@free.fr>

  - Alexander Couzens <lynxis@fe80.eu>



description:

  The Qualcomm Atheros AR7xxx/AR9XXX MISC interrupt controller is a secondary

  controller for lower priority interrupts.



properties:

  compatible:

    oneOf:

      - items:

          - const: qca,ar9132-misc-intc

          - const: qca,ar7100-misc-intc

      - const: qca,ar7240-misc-intc

  reg:

    maxItems: 1



  interrupts:

    maxItems: 1



  interrupt-controller: true



  '#interrupt-cells':

    const: 1



additionalProperties: false



required:

  - compatible

  - reg

  - interrupts

  - interrupt-controller

  - "#interrupt-cells"



examples:

  - |

    interrupt-controller@18060010 {

        compatible = "qca,ar9132-misc-intc", "qca,ar7100-misc-intc";

        reg = <0x18060010 0x4>;

        interrupts = <6>;

        interrupt-controller;

        #interrupt-cells = <1>;

    };

Documentation/devicetree/bindings/interrupt-controller/qca,ath79-misc-intc.txt

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Binding for Qualcomm Atheros AR7xxx/AR9XXX MISC interrupt controller



The MISC interrupt controller is a secondary controller for lower priority

interrupt.



Required Properties:

- compatible: has to be "qca,<soctype>-cpu-intc", "qca,ar7100-misc-intc" or

  "qca,<soctype>-cpu-intc", "qca,ar7240-misc-intc"

- reg: Base address and size of the controllers memory area

- interrupts: Interrupt specifier for the controllers interrupt.

- interrupt-controller : Identifies the node as an interrupt controller

- #interrupt-cells : Specifies the number of cells needed to encode interrupt

		     source, should be 1



Compatible fallback depends on the SoC. Use ar7100 for ar71xx and ar913x,

use ar7240 for all other SoCs.



Please refer to interrupts.txt in this directory for details of the common

Interrupt Controllers bindings used by client devices.



Example:



	interrupt-controller@18060010 {

		compatible = "qca,ar9132-misc-intc", "qca,ar7100-misc-intc";

		reg = <0x18060010 0x4>;



		interrupt-parent = <&cpuintc>;

		interrupts = <6>;



		interrupt-controller;

		#interrupt-cells = <1>;

	};



Another example:



	interrupt-controller@18060010 {

		compatible = "qca,ar9331-misc-intc", qca,ar7240-misc-intc";

		reg = <0x18060010 0x4>;



		interrupt-parent = <&cpuintc>;

		interrupts = <6>;



		interrupt-controller;

		#interrupt-cells = <1>;

	};