Commit fe2ef469 authored by Sascha Bischoff's avatar Sascha Bischoff Committed by Catalin Marinas
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arm64/sysreg: Support feature-specific fields with 'Prefix' descriptor



Some system register field encodings change based on, for example the
in-use architecture features, or the context in which they are
accessed. In order to support these different field encodings,
introduce the Prefix descriptor (Prefix, EndPrefix) for describing
such sysregs.

The Prefix descriptor can be used in the following way:

        Sysreg  EXAMPLE 0    1    2    3    4
        Prefix    FEAT_A
	Field   63:0    Foo
	EndPrefix
	Prefix    FEAT_B
	Field   63:1    Bar
 	Res0    0
        EndPrefix
        Field   63:0    Baz
        EndSysreg

This will generate a single set of system register encodings (REG_,
SYS_, ...), and then generate three sets of field definitions for the
system register called EXAMPLE. The first set is prefixed by FEAT_A,
e.g. FEAT_A_EXAMPLE_Foo. The second set is prefixed by FEAT_B, e.g.,
FEAT_B_EXAMPLE_Bar. The third set is not given a prefix at all,
e.g. EXAMPLE_BAZ. For each set, a corresponding set of defines for
Res0, Res1, and Unkn is generated.

The intent for the final prefix-less fields is to describe default or
legacy field encodings. This ensure that prefixed encodings can be
added to already-present sysregs without affecting existing legacy
code. Prefixed fields must be defined before those without a prefix,
and this is checked by the generator. This ensures consisnt ordering
within the sysregs definitions.

The Prefix descriptor can be used within Sysreg or SysregFields
blocks. Field, Res0, Res1, Unkn, Rax, SignedEnum, Enum can all be used
within a Prefix block. Fields and Mapping can not. Fields that vary
with features must be described as part of a SysregFields block,
instead. Mappings, which are just a code comment, make little sense in
this context, and have hence not been included.

There are no changes to the generated system register definitions as
part of this change.

Signed-off-by: default avatarSascha Bischoff <sascha.bischoff@arm.com>
Reviewed-by: default avatarMark Brown <broonie@kernel.org>
Signed-off-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
parent 0aab5772
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+88 −38
Original line number Diff line number Diff line
@@ -44,21 +44,26 @@ function expect_fields(nf) {

# Print a CPP macro definition, padded with spaces so that the macro bodies
# line up in a column
function define(name, val) {
	printf "%-56s%s\n", "#define " name, val
function define(prefix, name, val) {
	printf "%-56s%s\n", "#define " prefix name, val
}

# Same as above, but without a prefix
function define_reg(name, val) {
	define(null, name, val)
}

# Print standard BITMASK/SHIFT/WIDTH CPP definitions for a field
function define_field(reg, field, msb, lsb) {
	define(reg "_" field, "GENMASK(" msb ", " lsb ")")
	define(reg "_" field "_MASK", "GENMASK(" msb ", " lsb ")")
	define(reg "_" field "_SHIFT", lsb)
	define(reg "_" field "_WIDTH", msb - lsb + 1)
function define_field(prefix, reg, field, msb, lsb) {
	define(prefix, reg "_" field, "GENMASK(" msb ", " lsb ")")
	define(prefix, reg "_" field "_MASK", "GENMASK(" msb ", " lsb ")")
	define(prefix, reg "_" field "_SHIFT", lsb)
	define(prefix, reg "_" field "_WIDTH", msb - lsb + 1)
}

# Print a field _SIGNED definition for a field
function define_field_sign(reg, field, sign) {
	define(reg "_" field "_SIGNED", sign)
function define_field_sign(prefix, reg, field, sign) {
	define(prefix, reg "_" field "_SIGNED", sign)
}

# Parse a "<msb>[:<lsb>]" string into the global variables @msb and @lsb
@@ -128,6 +133,8 @@ $1 == "SysregFields" && block_current() == "Root" {

	next_bit = 63

	delete seen_prefixes

	next
}

@@ -136,9 +143,9 @@ $1 == "EndSysregFields" && block_current() == "SysregFields" {
	if (next_bit >= 0)
		fatal("Unspecified bits in " reg)

	define(reg "_RES0", "(" res0 ")")
	define(reg "_RES1", "(" res1 ")")
	define(reg "_UNKN", "(" unkn ")")
	define(prefix, reg "_RES0", "(" res0 ")")
	define(prefix, reg "_RES1", "(" res1 ")")
	define(prefix, reg "_UNKN", "(" unkn ")")
	print ""

	reg = null
@@ -170,19 +177,22 @@ $1 == "Sysreg" && block_current() == "Root" {
		fatal("Duplicate Sysreg definition for " reg)
	defined_regs[reg] = 1

	define("REG_" reg, "S" op0 "_" op1 "_C" crn "_C" crm "_" op2)
	define("SYS_" reg, "sys_reg(" op0 ", " op1 ", " crn ", " crm ", " op2 ")")
	define_reg("REG_" reg, "S" op0 "_" op1 "_C" crn "_C" crm "_" op2)
	define_reg("SYS_" reg, "sys_reg(" op0 ", " op1 ", " crn ", " crm ", " op2 ")")

	define("SYS_" reg "_Op0", op0)
	define("SYS_" reg "_Op1", op1)
	define("SYS_" reg "_CRn", crn)
	define("SYS_" reg "_CRm", crm)
	define("SYS_" reg "_Op2", op2)
	define_reg("SYS_" reg "_Op0", op0)
	define_reg("SYS_" reg "_Op1", op1)
	define_reg("SYS_" reg "_CRn", crn)
	define_reg("SYS_" reg "_CRm", crm)
	define_reg("SYS_" reg "_Op2", op2)

	print ""

	prefix = null
	next_bit = 63

	delete seen_prefixes

	next
}

@@ -192,11 +202,11 @@ $1 == "EndSysreg" && block_current() == "Sysreg" {
		fatal("Unspecified bits in " reg)

	if (res0 != null)
		define(reg "_RES0", "(" res0 ")")
		define(prefix, reg "_RES0", "(" res0 ")")
	if (res1 != null)
		define(reg "_RES1", "(" res1 ")")
		define(prefix, reg "_RES1", "(" res1 ")")
	if (unkn != null)
		define(reg "_UNKN", "(" unkn ")")
		define(prefix, reg "_UNKN", "(" unkn ")")
	if (res0 != null || res1 != null || unkn != null)
		print ""

@@ -209,6 +219,7 @@ $1 == "EndSysreg" && block_current() == "Sysreg" {
	res0 = null
	res1 = null
	unkn = null
	prefix = null

	block_pop()
	next
@@ -233,8 +244,7 @@ $1 == "EndSysreg" && block_current() == "Sysreg" {
	next
}


$1 == "Res0" && (block_current() == "Sysreg" || block_current() == "SysregFields") {
$1 == "Res0" && (block_current() == "Sysreg" || block_current() == "SysregFields" || block_current() == "Prefix") {
	expect_fields(2)
	parse_bitdef(reg, "RES0", $2)
	field = "RES0_" msb "_" lsb
@@ -244,7 +254,7 @@ $1 == "Res0" && (block_current() == "Sysreg" || block_current() == "SysregFields
	next
}

$1 == "Res1" && (block_current() == "Sysreg" || block_current() == "SysregFields") {
$1 == "Res1" && (block_current() == "Sysreg" || block_current() == "SysregFields" || block_current() == "Prefix") {
	expect_fields(2)
	parse_bitdef(reg, "RES1", $2)
	field = "RES1_" msb "_" lsb
@@ -254,7 +264,7 @@ $1 == "Res1" && (block_current() == "Sysreg" || block_current() == "SysregFields
	next
}

$1 == "Unkn" && (block_current() == "Sysreg" || block_current() == "SysregFields") {
$1 == "Unkn" && (block_current() == "Sysreg" || block_current() == "SysregFields" || block_current() == "Prefix") {
	expect_fields(2)
	parse_bitdef(reg, "UNKN", $2)
	field = "UNKN_" msb "_" lsb
@@ -264,62 +274,62 @@ $1 == "Unkn" && (block_current() == "Sysreg" || block_current() == "SysregFields
	next
}

$1 == "Field" && (block_current() == "Sysreg" || block_current() == "SysregFields") {
$1 == "Field" && (block_current() == "Sysreg" || block_current() == "SysregFields" || block_current() == "Prefix") {
	expect_fields(3)
	field = $3
	parse_bitdef(reg, field, $2)

	define_field(reg, field, msb, lsb)
	define_field(prefix, reg, field, msb, lsb)
	print ""

	next
}

$1 == "Raz" && (block_current() == "Sysreg" || block_current() == "SysregFields") {
$1 == "Raz" && (block_current() == "Sysreg" || block_current() == "SysregFields" || block_current() == "Prefix") {
	expect_fields(2)
	parse_bitdef(reg, field, $2)

	next
}

$1 == "SignedEnum" && (block_current() == "Sysreg" || block_current() == "SysregFields") {
$1 == "SignedEnum" && (block_current() == "Sysreg" || block_current() == "SysregFields" || block_current() == "Prefix") {
	block_push("Enum")

	expect_fields(3)
	field = $3
	parse_bitdef(reg, field, $2)

	define_field(reg, field, msb, lsb)
	define_field_sign(reg, field, "true")
	define_field(prefix, reg, field, msb, lsb)
	define_field_sign(prefix, reg, field, "true")

	delete seen_enum_vals

	next
}

$1 == "UnsignedEnum" && (block_current() == "Sysreg" || block_current() == "SysregFields") {
$1 == "UnsignedEnum" && (block_current() == "Sysreg" || block_current() == "SysregFields" || block_current() == "Prefix") {
	block_push("Enum")

	expect_fields(3)
	field = $3
	parse_bitdef(reg, field, $2)

	define_field(reg, field, msb, lsb)
	define_field_sign(reg, field, "false")
	define_field(prefix, reg, field, msb, lsb)
	define_field_sign(prefix, reg, field, "false")

	delete seen_enum_vals

	next
}

$1 == "Enum" && (block_current() == "Sysreg" || block_current() == "SysregFields") {
$1 == "Enum" && (block_current() == "Sysreg" || block_current() == "SysregFields" || block_current() == "Prefix") {
	block_push("Enum")

	expect_fields(3)
	field = $3
	parse_bitdef(reg, field, $2)

	define_field(reg, field, msb, lsb)
	define_field(prefix, reg, field, msb, lsb)

	delete seen_enum_vals

@@ -349,7 +359,47 @@ $1 == "EndEnum" && block_current() == "Enum" {
		fatal("Duplicate Enum value " val " for " name)
	seen_enum_vals[val] = 1

	define(reg "_" field "_" name, "UL(" val ")")
	define(prefix, reg "_" field "_" name, "UL(" val ")")
	next
}

$1 == "Prefix" && (block_current() == "Sysreg" || block_current() == "SysregFields") {
	block_push("Prefix")

	expect_fields(2)

	if (next_bit < 63)
		fatal("Prefixed fields must precede non-prefixed fields (" reg ")")

	prefix = $2 "_"

	if (prefix in seen_prefixes)
		fatal("Duplicate prefix " prefix " for " reg)
	seen_prefixes[prefix] = 1

	res0 = "UL(0)"
	res1 = "UL(0)"
	unkn = "UL(0)"
	next_bit = 63

	next
}

$1 == "EndPrefix" && block_current() == "Prefix" {
	expect_fields(1)
	if (next_bit >= 0)
		fatal("Unspecified bits in prefix " prefix " for " reg)

	define_resx_unkn(prefix, reg, res0, res1, unkn)

	prefix = null
	res0 = "UL(0)"
	res1 = "UL(0)"
	unkn = "UL(0)"
	next_bit = 63

	block_pop()

	next
}