Commit fe681e7b authored by Matt Roper's avatar Matt Roper
Browse files

drm/xe: Consolidate workaround entries for Wa_18033852989 



Wa_18033852989 applies to all graphics versions from 20.01 through 20.04
(inclusive).  Consolidate the RTP entries into a single range-based entry.

Reviewed-by: default avatarShuicheng Lin <shuicheng.lin@intel.com>
Link: https://patch.msgid.link/20260220-forupstream-wa_cleanup-v2-19-b12005a05af6@intel.com


Signed-off-by: default avatarMatt Roper <matthew.d.roper@intel.com>
parent c2142a1a

drivers/gpu/drm/xe/xe_wa.c

+4 −8
Original line number Diff line number Diff line
@@ -660,6 +660,10 @@ static const struct xe_rtp_entry_sr lrc_was[] = { 
	  XE_RTP_RULES(GRAPHICS_VERSION_RANGE(2001, 2004), ENGINE_CLASS(RENDER)),

	  XE_RTP_ACTIONS(SET(XEHP_PSS_CHICKEN, FLSH_IGNORES_PSD))

	},

	{ XE_RTP_NAME("18033852989"),

	  XE_RTP_RULES(GRAPHICS_VERSION_RANGE(2001, 2004), ENGINE_CLASS(RENDER)),

	  XE_RTP_ACTIONS(SET(COMMON_SLICE_CHICKEN1, DISABLE_BOTTOM_CLIP_RECTANGLE_TEST))

	},



	/* DG1 */
@@ -716,10 +720,6 @@ static const struct xe_rtp_entry_sr lrc_was[] = { 


	/* Xe2_LPG */



	{ XE_RTP_NAME("18033852989"),

	  XE_RTP_RULES(GRAPHICS_VERSION(2004), ENGINE_CLASS(RENDER)),

	  XE_RTP_ACTIONS(SET(COMMON_SLICE_CHICKEN1, DISABLE_BOTTOM_CLIP_RECTANGLE_TEST))

	},

	{ XE_RTP_NAME("14021567978"),

	  XE_RTP_RULES(GRAPHICS_VERSION_RANGE(2001, XE_RTP_END_VERSION_UNDEFINED),

		       ENGINE_CLASS(RENDER)),
@@ -770,10 +770,6 @@ static const struct xe_rtp_entry_sr lrc_was[] = { 
	  XE_RTP_RULES(GRAPHICS_VERSION_RANGE(2001, 2002), ENGINE_CLASS(RENDER)),

	  XE_RTP_ACTIONS(SET(COMMON_SLICE_CHICKEN4, SBE_PUSH_CONSTANT_BEHIND_FIX_ENABLE))

	},

	{ XE_RTP_NAME("18033852989"),

	  XE_RTP_RULES(GRAPHICS_VERSION(2001), ENGINE_CLASS(RENDER)),

	  XE_RTP_ACTIONS(SET(COMMON_SLICE_CHICKEN1, DISABLE_BOTTOM_CLIP_RECTANGLE_TEST))

	},



	/* Xe3_LPG */

	{ XE_RTP_NAME("14021490052"),