Commit ff38bbba authored by Ard Biesheuvel's avatar Ard Biesheuvel
Browse files

x86/efi/mixed: Factor out and clean up long mode entry 



Entering long mode involves setting the EFER_LME and CR4.PAE bits before
enabling paging by setting CR0.PG bit.

It also involves disabling interrupts, given that the firmware's 32-bit
IDT becomes invalid as soon as the CPU transitions into long mode.

Reloading the CR3 register is not necessary at boot time, given that the
EFI firmware as well as the kernel's EFI stub use a 1:1 mapping of the
32-bit addressable memory in the system.

Break out this code into a separate helper for clarity, and so that it
can be reused in a subsequent patch.

Acked-by: default avatarIngo Molnar <mingo@kernel.org>
Signed-off-by: default avatarArd Biesheuvel <ardb@kernel.org>
parent eaed8955

arch/x86/boot/compressed/efi_mixed.S

+15 −14
Original line number Diff line number Diff line
@@ -170,10 +170,6 @@ SYM_FUNC_START_LOCAL(efi_enter32) 
	movl	%edx, %gs

	movl	%edx, %ss



	/* Reload pgtables */

	movl	%cr3, %eax

	movl	%eax, %cr3



	/* Disable paging */

	movl	%cr0, %eax

	btrl	$X86_CR0_PG_BIT, %eax
@@ -199,30 +195,35 @@ SYM_FUNC_START_LOCAL(efi_enter32) 
	lidtl	16(%ebx)

	lgdtl	(%ebx)



	xorl	%eax, %eax

	lldt	%ax



	call	efi32_enable_long_mode



	pushl	$__KERNEL_CS

	pushl	%ebp

	lret

SYM_FUNC_END(efi_enter32)



SYM_FUNC_START_LOCAL(efi32_enable_long_mode)

	movl	%cr4, %eax

	btsl	$(X86_CR4_PAE_BIT), %eax

	movl	%eax, %cr4



	movl	%cr3, %eax

	movl	%eax, %cr3



	movl	$MSR_EFER, %ecx

	rdmsr

	btsl	$_EFER_LME, %eax

	wrmsr



	xorl	%eax, %eax

	lldt	%ax



	pushl	$__KERNEL_CS

	pushl	%ebp

	/* Disable interrupts - the firmware's IDT does not work in long mode */

	cli



	/* Enable paging */

	movl	%cr0, %eax

	btsl	$X86_CR0_PG_BIT, %eax

	movl	%eax, %cr0

	lret

SYM_FUNC_END(efi_enter32)

	ret

SYM_FUNC_END(efi32_enable_long_mode)



/*

 * This is the common EFI stub entry point for mixed mode.