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efef7f184f
For historic reasons there are some TSC-related functions in the
<asm/msr.h> header, even though there's an <asm/tsc.h> header.
To facilitate the relocation of rdtsc{,_ordered}() from <asm/msr.h>
to <asm/tsc.h> and to eventually eliminate the inclusion of
<asm/msr.h> in <asm/tsc.h>, add an explicit <asm/msr.h> dependency
to the source files that reference definitions from <asm/msr.h>.
[ mingo: Clarified the changelog. ]
Signed-off-by: Xin Li (Intel) <xin@zytor.com>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Acked-by: Dave Hansen <dave.hansen@linux.intel.com>
Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Acked-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Cc: Andy Lutomirski <luto@kernel.org>
Cc: Brian Gerst <brgerst@gmail.com>
Cc: Juergen Gross <jgross@suse.com>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Kees Cook <keescook@chromium.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Josh Poimboeuf <jpoimboe@redhat.com>
Cc: Uros Bizjak <ubizjak@gmail.com>
Link: https://lore.kernel.org/r/20250501054241.1245648-1-xin@zytor.com
92 lines
2.1 KiB
C
92 lines
2.1 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef _ASM_X86_MICROCODE_H
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#define _ASM_X86_MICROCODE_H
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#include <asm/msr.h>
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struct cpu_signature {
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unsigned int sig;
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unsigned int pf;
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unsigned int rev;
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};
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struct ucode_cpu_info {
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struct cpu_signature cpu_sig;
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void *mc;
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};
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#ifdef CONFIG_MICROCODE
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void load_ucode_bsp(void);
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void load_ucode_ap(void);
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void microcode_bsp_resume(void);
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#else
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static inline void load_ucode_bsp(void) { }
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static inline void load_ucode_ap(void) { }
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static inline void microcode_bsp_resume(void) { }
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#endif
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extern unsigned long initrd_start_early;
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#ifdef CONFIG_CPU_SUP_INTEL
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/* Intel specific microcode defines. Public for IFS */
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struct microcode_header_intel {
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unsigned int hdrver;
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unsigned int rev;
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unsigned int date;
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unsigned int sig;
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unsigned int cksum;
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unsigned int ldrver;
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unsigned int pf;
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unsigned int datasize;
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unsigned int totalsize;
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unsigned int metasize;
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unsigned int min_req_ver;
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unsigned int reserved;
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};
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struct microcode_intel {
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struct microcode_header_intel hdr;
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unsigned int bits[];
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};
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#define DEFAULT_UCODE_DATASIZE (2000)
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#define MC_HEADER_SIZE (sizeof(struct microcode_header_intel))
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#define MC_HEADER_TYPE_MICROCODE 1
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#define MC_HEADER_TYPE_IFS 2
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static inline int intel_microcode_get_datasize(struct microcode_header_intel *hdr)
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{
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return hdr->datasize ? : DEFAULT_UCODE_DATASIZE;
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}
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static inline u32 intel_get_microcode_revision(void)
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{
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u32 rev, dummy;
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native_wrmsrq(MSR_IA32_UCODE_REV, 0);
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/* As documented in the SDM: Do a CPUID 1 here */
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native_cpuid_eax(1);
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/* get the current revision from MSR 0x8B */
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native_rdmsr(MSR_IA32_UCODE_REV, dummy, rev);
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return rev;
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}
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#endif /* !CONFIG_CPU_SUP_INTEL */
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bool microcode_nmi_handler(void);
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void microcode_offline_nmi_handler(void);
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#ifdef CONFIG_MICROCODE_LATE_LOADING
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DECLARE_STATIC_KEY_FALSE(microcode_nmi_handler_enable);
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static __always_inline bool microcode_nmi_handler_enabled(void)
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{
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return static_branch_unlikely(µcode_nmi_handler_enable);
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}
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#else
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static __always_inline bool microcode_nmi_handler_enabled(void) { return false; }
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#endif
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#endif /* _ASM_X86_MICROCODE_H */
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