scsi: ufs: core: Track when MCQ ESI is enabled
In preparation of adding a threaded interrupt handler, track when the MCQ ESI interrupt handlers were installed so we can optimize the MCQ interrupt handling to avoid walking the threaded handler in the case ESI handlers are enabled. Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20250407-topic-ufs-use-threaded-irq-v3-2-08bee980f71e@linaro.org Reviewed-by: Bart Van Assche <bvanassche@acm.org> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
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@ -8717,6 +8717,7 @@ static void ufshcd_config_mcq(struct ufs_hba *hba)
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u32 intrs;
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ret = ufshcd_mcq_vops_config_esi(hba);
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hba->mcq_esi_enabled = !ret;
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dev_info(hba->dev, "ESI %sconfigured\n", ret ? "is not " : "");
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intrs = UFSHCD_ENABLE_MCQ_INTRS;
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@ -954,6 +954,7 @@ enum ufshcd_mcq_opr {
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* ufshcd_resume_complete()
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* @mcq_sup: is mcq supported by UFSHC
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* @mcq_enabled: is mcq ready to accept requests
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* @mcq_esi_enabled: is mcq ESI configured
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* @res: array of resource info of MCQ registers
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* @mcq_base: Multi circular queue registers base address
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* @uhq: array of supported hardware queues
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@ -1122,6 +1123,7 @@ struct ufs_hba {
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bool mcq_sup;
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bool lsdb_sup;
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bool mcq_enabled;
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bool mcq_esi_enabled;
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struct ufshcd_res_info res[RES_MAX];
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void __iomem *mcq_base;
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struct ufs_hw_queue *uhq;
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