cpufreq: ti: Allow all silicon revisions to support OPPs
More silicon revisions are being defined for AM62x, AM62Px, and AM62ax SoCs. These silicon may also support currently establishes OPPs, so remove the revision limitation in ti-cpufreq and thus determine if an OPP applies with speed grade efuse parsing. Signed-off-by: Judith Mendez <jm@ti.com> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
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@ -311,10 +311,10 @@ static struct ti_cpufreq_soc_data am3517_soc_data = {
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};
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static const struct soc_device_attribute k3_cpufreq_soc[] = {
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{ .family = "AM62X", .revision = "SR1.0" },
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{ .family = "AM62AX", .revision = "SR1.0" },
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{ .family = "AM62PX", .revision = "SR1.0" },
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{ .family = "AM62DX", .revision = "SR1.0" },
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{ .family = "AM62X", },
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{ .family = "AM62AX", },
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{ .family = "AM62PX", },
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{ .family = "AM62DX", },
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{ /* sentinel */ }
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};
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