* doc/xml/manual/status_cxx2017.xml: Update status.
* doc/html/manual/status.html: Regenerate.
* include/bits/shared_ptr.h (shared_ptr(unique_ptr<_Yp, _Del>)): Add
extension constructor to maintain C++14 behaviour.
* include/bits/shared_ptr_base.h (__sp_array_delete): Add new struct.
(__shared_count(_Ptr, false_type), __shared_count(_Ptr, true_type)):
New constructors.
(__sp_compatible_with, __sp_is_constructible): Add specializations
for array support.
(__sp_is_constructible_arr, __sp_is_constructible_arrN): New helpers.
(__shared_ptr_access): New base class for observer member functions.
(__shared_ptr::element_type): Use remove_extent.
(__shared_ptr::_UniqCompatible): Add __sp_compatible_with check.
(__shared_ptr(_Yp*)): Use tag dispatching to call new __shared_count
constructor.
(__shared_ptr(unique_ptr<_Yp, _Del>)): Add extension constructor.
(__shared_ptr::operator*, __shared_ptr::operator->): Remove and
inherit from __shared_ptr_access base class.
(__shared_ptr::__has_esft_base): Return false for array types.
(__weak_ptr::element_type): Use remove_extent.
* include/experimental/bits/shared_ptr.h (__libfund_v1): Remove.
(__shared_ptr<__libfund_v1<_Tp>>): Remove specializations.
(__wak_ptr<__libfund_v1<_Tp>>): Likewise.
(experimental::__sp_compatible_v): Redefine using
__sp_compatible_with.
(experimental::__sp_is_constructible_v): Redefine using
__sp_is_constructible.
(get_deleter, operator<<): Change argument from __shared_ptr to
shared_ptr.
* testsuite/20_util/shared_ptr/cons/array.cc: New test.
* testsuite/20_util/shared_ptr/cons/unique_ptr_array.cc: Adjust for
new behaviour.
* testsuite/20_util/shared_ptr/observers/array.cc: Test observers for
arrays.
* testsuite/20_util/shared_ptr/observers/array_neg.cc: New test.
From-SVN: r242369
* gcc-interface/decl.c (gnat_to_gnu_entity): In assertion about known
Esize, protect with !is_type and change !Unknown_Esize to Known_Esize.
From-SVN: r242363
* gcc-interface/utils2.c (gnat_protect_expr): Also protect only the
address if the expression is the component of a dereference.
Do not use a reference type for the final temporary reference.
From-SVN: r242358
* c-ada-spec.c (print_ada_declaration): For typedef declarations, look
for nested types only if the type is a record or union and dump SLOC.
From-SVN: r242356
2016-11-13 Janus Weil <janus@gcc.gnu.org>
PR fortran/60952
* decl.c (match_procedure_in_type): Apply the FL_PROCEDURE attribute
to the target procedure.
2016-11-13 Janus Weil <janus@gcc.gnu.org>
PR fortran/60952
* gfortran.dg/typebound_proc_34.f90: New test.
From-SVN: r242352
The code generating traceback tables mistakenly does an early return
if !optional_tbtab, which causes it to miss the code generating the TOC
section. This only matters if the TOC will be empty since otherwise
the section is created elsewhere.
This patch fixes it.
PR target/77957
* config/rs6000/rs6000.c (rs6000_output_function_epilogue): Don't
return early if !optional_tbtab.
From-SVN: r242336
2016-11-12 Janus Weil <janus@gcc.gnu.org>
PR fortran/77501
* class.c (gfc_find_typebound_intrinsic_op): Remove an unnecessary
assert and nullification.
* decl.c (gfc_match_decl_type_spec): Use gfc_get_tbp_symtree,
fix indentation.
(gfc_match_generic): Remove an unnecessary assert.
Use gfc_get_tbp_symtree to avoid ICE.
2016-11-12 Janus Weil <janus@gcc.gnu.org>
PR fortran/77501
* gfortran.dg/typebound_generic_16.f90: New test.
From-SVN: r242335
PR rtl-optimization/59461
* doc/rtl.texi (paradoxical subregs): Add missing word.
* combine.c (reg_nonzero_bits_for_combine): Do not discard results
in modes with precision larger than that of last_set_mode.
* rtlanal.c (nonzero_bits1) <SUBREG>: If WORD_REGISTER_OPERATIONS is
set and LOAD_EXTEND_OP is appropriate, propagate results from inner
REGs to paradoxical SUBREGs.
(num_sign_bit_copies1) <SUBREG>: Likewise. Check that the mode is not
larger than a word before invoking LOAD_EXTEND_OP on it.
From-SVN: r242326
* config/i386/i386.md (*<shift_insn><mode>3_doubleword): Mark
operand 0 as earlyclobber.
(*ashl<mode>3_doubleword): Ditto for all operand 0 alternatives.
From-SVN: r242318
2016-11-11 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/78243
* config/rs6000/vsx.md (vsx_extract_<mode>_p9): Correct the
element order for little endian ordering.
* config/rs6000/altivec.md (reduc_plus_scal_<mode>): Use
VECTOR_ELT_ORDER_BIG and not BYTES_BIG_ENDIAN to adjust element
number.
From-SVN: r242317
The __cpu_indicator_init and __cpu_model symbols are not safe to use
from shared libgcc_s.so from ifunc resolvers, so since gcc-6, only
the definitions from static libgcc.a are used, however the symbols
are kept in libgcc_s as well for backward compatibility (with
appropriate symbol version). On targets without such backward
compatibility concern add cpuinfo to the static library only (this
avoids running the ctor, reduces libgcc_s size and elf abi concerns
about the versioned symbols).
libgcc/
2016-11-11 Szabolcs Nagy <szabolcs.nagy@arm.com>
* config.host (i[3456]86-*-musl*, x86_64-*-musl*): Use
i386/t-cpuinfo-static instead of i386/t-cpuinfo.
* config/i386/t-cpuinfo-static: New.
From-SVN: r242268
* gimple-ssa-isolate-paths.c (is_divmod_with_given_divisor): New
function.
(stmt_uses_name_in_undefined_way): New function, extracted from
find_implicit_erroneous_behavior and extended for div/mod case.
(stmt_uses_0_or_null_in_undefined_way): New function, extracted from
find_explicit_erroneous_behavior and extended for div/mod case.
(find_implicit_erroneous_behavior): Use new helper function.
(find_explicit_erroneous_behavior): Use new helper function.
* gcc.dg/tree-ssa/isolate-6.c: New test.
* gcc.dg/tree-ssa/isolate-7.c: New test.
From-SVN: r242075
2016-11-11 Richard Biener <rguenther@suse.de>
PR middle-end/78295
* tree-ssa-uninit.c (warn_uninitialized_vars): Do not warn
about uninitialized destination arg of BIT_INSERT_EXPR.
* gcc.dg/uninit-pr78295.c: New testcase.
From-SVN: r242068
Add a little shell script to auto-generate runtime.sigtable from the
known signal names.
Force the main package to always import the runtime package. Otherwise
some runtime package global variables may never be initialized.
Set the syscallsp and syscallpc fields of g when entering a syscall, so
that the runtime package knows when a g is executing a syscall.
Fix runtime.funcPC to avoid dead store elimination of the interface
value when the function is inlined.
Reviewed-on: https://go-review.googlesource.com/33025
From-SVN: r242060
When combine splits a three-insn combination into two instructions it
can reuse i2dest for the temporary result of the first new instruction.
However all information it has in reg_stat about that register will be
stale. This results in the simplify_gen_binary calls in change_zero_ext
using out-of-date information, which makes it think one of the ANDs
generated there always results in 0, and it doesn't get better from there.
This can also happen if a splitter in the MD uses nonzero_bits (for
example). I tried to make the splitting code in combine save and restore
the i2dest reg_stat info, but that causes one of the acats tests to fail.
This whole reg_stat thing needs an overhaul, and/or we shouldn't reuse
i2dest for unrelated purposes when splitting.
This patch changes change_zero_ext to do the expected simplifications
itself and not call simplify_gen_*.
PR rtl-optimization/78232
* combine.c (try_combine): Add a big comment about why reusing i2dest
is undesirable.
(change_zero_ext): Do not call simplify_gen_binary, do the
simplifications manually.
From-SVN: r242059
* pt.c (tsubst_friend_function): Don't set DECL_INITIAL.
(instantiate_decl): It's OK to defer a constexpr function.
* cp-tree.h (DECL_FRIEND_PSEUDO_TEMPLATE_INSTANTIATION): Check
DECL_LANG_SPECIFIC.
* decl2.c (decl_defined_p): Use it. No longer static.
* decl.c (redeclaration_error_message): Use decl_defined_p.
* constexpr.c (cxx_eval_call_expression): Set input_location around
call to instantiate_decl.
From-SVN: r242056
[gcc]
2016-11-10 Michael Meissner <meissner@linux.vnet.ibm.com>
* config/rs6000/rs6000.c (rs6000_hard_regno_mode_ok): If ISA 3.0,
enable HImode and QImode to go in vector registers by default if
the -mvsx-small-integer option is enabled.
(rs6000_secondary_reload_simple_move): Likewise.
(rs6000_preferred_reload_class): Don't force integer constants to
be loaded into vector registers that we can easily make into
memory (or being created in the GPRs and moved over with direct
move).
* config/rs6000/vsx.md (UNSPEC_P9_MEMORY): Delete, no longer
used.
(vsx_extract_<mode>): Rework V4SImode, V8HImode, and V16QImode
vector extraction on ISA 3.0 when the scalar integer can be
allocated in vector registers. Generate the VEC_SELECT directy,
and don't use UNSPEC's to avoid having the scalar type in a vector
register. Make the expander target registers, and let the
combiner fold in results storing to memory, if the machine
supports stores.
(vsx_extract_<mode>_di): Likewise.
(vsx_extract_<mode>_p9): Likewise.
(vsx_extract_<mode>_di_p9): Likewise.
(vsx_extract_<mode>_store_p9): Likewise.
(vsx_extract_si): Likewise.
(vsx_extract_<mode>_p8): Likewise.
(p9_lxsi<wd>zx): Delete, no longer used.
(p9_stxsi<wd>x): Likewise.
* config/rs6000/rs6000.md (INT_ISA3): New mode iterator for
integers in vector registers for ISA 3.0.
(QHI): Update comment.
(zero_extendqi<mode>2): Add support for ISA 3.0 scalar load or
vector extract instructions in sign/zero extend.
(zero_extendhi<mode>): Likewise.
(extendqi<mode>): Likewise.
(extendhi<mode>2): Likewise.
(HImode splitter for load/sign extend in vector register):
Likewise.
(float<QHI:mode><FP_ISA3:mode>2): Eliminate old method of
optimizing floating point conversions to/from small data types and
rewrite it to support QImode/HImode being allowed in vector
registers on ISA 3.0.
(float<QHI:mode><FP_ISA3:mode>2_internal): Likewise.
(floatuns<QHI:mode><FP_ISA3:mode>2): Likewise.
(floatuns<QHI:mode><FP_ISA3:mode>2_internal): Likewise.
(fix_trunc<SFDF:mode><QHI:mode>2): Likewise.
(fix_trunc<SFDF:mode><QHI:mode>2_internal): Likewise.
(fixuns_trunc<SFDF:mode><QHI:mode>2): Likewise.
(fixuns_trunc<SFDF:mode><QHI:mode>2_internal): Likewise.
VSPLITISW on ISA 2.07.
(movhi_internal): Combine movhi_internal and movqi_internal into
one mov<mode>_internal with an iterator. Add support for QImode
and HImode being allowed in vector registers. Make large number
of attributes and constraints easier to read.
(movqi_internal): Likewise.
(mov<mode>_internal): Likewise.
(movdi_internal64): Fix constraint to allow loading -16..15 with
VSPLITISW on ISA 2.07.
(integer XXSPLTIB splitter): Add support for QI, HI, and SImode as
well as DImode.
[gcc/testsuite]
2016-11-10 Michael Meissner <meissner@linux.vnet.ibm.com>
* gcc.target/powerpc/vsx-qimode.c: New test for QImode, HImode
being allowed in vector registers.
* gcc.target/powerpc/vsx-qimode2.c: Likewise.
* gcc.target/powerpc/vsx-qimode3.c: Likewise.
* gcc.target/powerpc/vsx-himode.c: Likewise.
* gcc.target/powerpc/vsx-himode2.c: Likewise.
* gcc.target/powerpc/vsx-himode3.c: Likewise.
* gcc.target/powerpc/p9-extract-1.c: Change MFVSRD to just MFVSR,
to allow matching MFVSRD or MFVSRW.
From-SVN: r242048
Jonathan Wakely