Commit 088e350d authored by Oleksij Rempel's avatar Oleksij Rempel Committed by Shawn Guo
Browse files

ARM: dts: imx6dl-eckelmann-ci4x10: configure ethernet reference clock parent 



On this board the PHY is the ref clock provider. So, configure ethernet
reference clock as input.

Signed-off-by: default avatarOleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent c8961407

arch/arm/boot/dts/imx6dl-eckelmann-ci4x10.dts

+8 −5
Original line number Diff line number Diff line
@@ -28,6 +28,7 @@ rmii_clk: clock-rmii { 
		compatible = "fixed-clock";

		#clock-cells = <0>;

		clock-frequency = <50000000>;

		clock-output-names = "enet_ref_pad";

	};



	reg_usb_h1_vbus: regulator-usb-h1-vbus {
@@ -64,6 +65,13 @@ &can2 { 
	status = "okay";

};



&clks {

	clocks = <&rmii_clk>;

	clock-names = "enet_ref_pad";

	assigned-clocks = <&clks IMX6QDL_CLK_ENET_REF_SEL>;

	assigned-clock-parents = <&rmii_clk>;

};



&ecspi2 {

	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_ecspi2>;
@@ -297,11 +305,6 @@ &fec { 
	phy-mode = "rmii";

	phy-reset-gpios = <&gpio1 18 GPIO_ACTIVE_LOW>;

	phy-handle = <&phy>;

	clocks = <&clks IMX6QDL_CLK_ENET>,

		 <&clks IMX6QDL_CLK_ENET>,

		 <&rmii_clk>,

		 <&clks IMX6QDL_CLK_ENET_REF>;

	clock-names = "ipg", "ahb", "ptp", "enet_out";

	status = "okay";



	mdio {